From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37846) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE44-00083a-QR for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VeE3y-0006J1-Fw for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:16 -0500 Received: from mail-pa0-x234.google.com ([2607:f8b0:400e:c03::234]:62209) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE3y-0006Iq-4l for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:10 -0500 Received: by mail-pa0-f52.google.com with SMTP id bj1so475055pad.39 for ; Wed, 06 Nov 2013 17:07:09 -0800 (PST) Received: from pebble.com (CPE-138-130-249-46.lnse4.cha.bigpond.net.au. [138.130.249.46]) by mx.google.com with ESMTPSA id xs1sm1726198pac.7.2013.11.06.17.07.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 17:07:08 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 7 Nov 2013 11:04:48 +1000 Message-Id: <1383786324-18415-26-git-send-email-rth@twiddle.net> In-Reply-To: <1383786324-18415-1-git-send-email-rth@twiddle.net> References: <1383786324-18415-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH for-1.8 25/61] target-i386: Remove gen_op_movl_T0_im* List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Propagate the definitions into all users. The only time that gen_op_movl_T1_imu was used, the input was type 'unsigned', so the replacement works identically. Signed-off-by: Richard Henderson --- target-i386/translate.c | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 8c45295..88e7d08 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -252,16 +252,6 @@ static void gen_update_cc_op(DisasContext *s) } } -static inline void gen_op_movl_T1_im(int32_t val) -{ - tcg_gen_movi_tl(cpu_T[1], val); -} - -static inline void gen_op_movl_T1_imu(uint32_t val) -{ - tcg_gen_movi_tl(cpu_T[1], val); -} - static inline void gen_op_movl_A0_im(uint32_t val) { tcg_gen_movi_tl(cpu_A0, val); @@ -1934,7 +1924,7 @@ static void gen_shifti(DisasContext *s1, int op, int ot, int d, int c) break; default: /* currently not optimized */ - gen_op_movl_T1_im(c); + tcg_gen_movi_tl(cpu_T[1], c); gen_shift(s1, op, ot, d, OR_TMP1); break; } @@ -4727,7 +4717,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, break; case 2: /* OP A, Iv */ val = insn_get(env, s, ot); - gen_op_movl_T1_im(val); + tcg_gen_movi_tl(cpu_T[1], val); gen_op(s, op, ot, OR_EAX); break; } @@ -4775,7 +4765,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, val = (int8_t)insn_get(env, s, MO_8); break; } - gen_op_movl_T1_im(val); + tcg_gen_movi_tl(cpu_T[1], val); gen_op(s, op, ot, opreg); } break; @@ -4813,7 +4803,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, switch(op) { case 0: /* test */ val = insn_get(env, s, ot); - gen_op_movl_T1_im(val); + tcg_gen_movi_tl(cpu_T[1], val); gen_op_testl_T0_T1_cc(); set_cc_op(s, CC_OP_LOGICB + ot); break; @@ -5124,7 +5114,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, val = insn_get(env, s, ot); gen_op_mov_TN_reg(ot, 0, OR_EAX); - gen_op_movl_T1_im(val); + tcg_gen_movi_tl(cpu_T[1], val); gen_op_testl_T0_T1_cc(); set_cc_op(s, CC_OP_LOGICB + ot); break; @@ -5180,10 +5170,10 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); if (b == 0x69) { val = insn_get(env, s, ot); - gen_op_movl_T1_im(val); + tcg_gen_movi_tl(cpu_T[1], val); } else if (b == 0x6b) { val = (int8_t)insn_get(env, s, MO_8); - gen_op_movl_T1_im(val); + tcg_gen_movi_tl(cpu_T[1], val); } else { gen_op_mov_TN_reg(ot, 1, reg); } @@ -6676,7 +6666,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, selector = insn_get(env, s, MO_16); tcg_gen_movi_tl(cpu_T[0], selector); - gen_op_movl_T1_imu(offset); + tcg_gen_movi_tl(cpu_T[1], offset); } goto do_lcall; case 0xe9: /* jmp im */ @@ -6702,7 +6692,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, selector = insn_get(env, s, MO_16); tcg_gen_movi_tl(cpu_T[0], selector); - gen_op_movl_T1_imu(offset); + tcg_gen_movi_tl(cpu_T[1], offset); } goto do_ljmp; case 0xeb: /* jmp Jb */ @@ -6869,7 +6859,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } /* load shift */ val = cpu_ldub_code(env, s->pc++); - gen_op_movl_T1_im(val); + tcg_gen_movi_tl(cpu_T[1], val); if (op < 4) goto illegal_op; op -= 4; -- 1.8.3.1