From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE46-00087D-IL for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VeE40-0006L6-Oa for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:18 -0500 Received: from mail-pb0-x230.google.com ([2607:f8b0:400e:c01::230]:61640) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE40-0006Kt-Ht for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:12 -0500 Received: by mail-pb0-f48.google.com with SMTP id mc8so303773pbc.21 for ; Wed, 06 Nov 2013 17:07:11 -0800 (PST) Received: from pebble.com (CPE-138-130-249-46.lnse4.cha.bigpond.net.au. [138.130.249.46]) by mx.google.com with ESMTPSA id xs1sm1726198pac.7.2013.11.06.17.07.09 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 17:07:10 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 7 Nov 2013 11:04:49 +1000 Message-Id: <1383786324-18415-27-git-send-email-rth@twiddle.net> In-Reply-To: <1383786324-18415-1-git-send-email-rth@twiddle.net> References: <1383786324-18415-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH for-1.8 26/61] target-i386: Remove gen_op_mov*_A0_im List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Propagate the definitions into all users. In two cases, this allows us to share code between the 32-bit and 64-bit immediate moves. Signed-off-by: Richard Henderson --- target-i386/translate.c | 26 +++----------------------- 1 file changed, 3 insertions(+), 23 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 88e7d08..bda9ff4 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -252,18 +252,6 @@ static void gen_update_cc_op(DisasContext *s) } } -static inline void gen_op_movl_A0_im(uint32_t val) -{ - tcg_gen_movi_tl(cpu_A0, val); -} - -#ifdef TARGET_X86_64 -static inline void gen_op_movq_A0_im(int64_t val) -{ - tcg_gen_movi_tl(cpu_A0, val); -} -#endif - static inline void gen_movtl_T0_im(target_ulong val) { tcg_gen_movi_tl(cpu_T[0], val); @@ -2003,14 +1991,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) gen_op_addl_A0_im(disp); } } else { -#ifdef TARGET_X86_64 - if (s->aflag == 2) { - gen_op_movq_A0_im(disp); - } else -#endif - { - gen_op_movl_A0_im(disp); - } + tcg_gen_movi_tl(cpu_A0, disp); } /* index == 4 means no index */ if (havesib && (index != 4)) { @@ -2045,7 +2026,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) if (rm == 6) { disp = cpu_lduw_code(env, s->pc); s->pc += 2; - gen_op_movl_A0_im(disp); + tcg_gen_movi_tl(cpu_A0, disp); rm = 0; /* avoid SS override */ goto no_rm; } else { @@ -5619,7 +5600,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, if (s->aflag == 2) { offset_addr = cpu_ldq_code(env, s->pc); s->pc += 8; - gen_op_movq_A0_im(offset_addr); } else #endif { @@ -5628,8 +5608,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } else { offset_addr = insn_get(env, s, MO_16); } - gen_op_movl_A0_im(offset_addr); } + tcg_gen_movi_tl(cpu_A0, offset_addr); gen_add_A0_ds_seg(s); if ((b & 2) == 0) { gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); -- 1.8.3.1