From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37989) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE4Q-0008LW-D9 for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VeE4K-0006Ny-IM for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:38 -0500 Received: from mail-pd0-x231.google.com ([2607:f8b0:400e:c02::231]:38759) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE4K-0006Np-BA for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:32 -0500 Received: by mail-pd0-f177.google.com with SMTP id p10so305340pdj.8 for ; Wed, 06 Nov 2013 17:07:31 -0800 (PST) Received: from pebble.com (CPE-138-130-249-46.lnse4.cha.bigpond.net.au. [138.130.249.46]) by mx.google.com with ESMTPSA id xs1sm1726198pac.7.2013.11.06.17.07.28 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 17:07:30 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 7 Nov 2013 11:04:57 +1000 Message-Id: <1383786324-18415-35-git-send-email-rth@twiddle.net> In-Reply-To: <1383786324-18415-1-git-send-email-rth@twiddle.net> References: <1383786324-18415-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH for-1.8 34/61] target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOp List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Change the domain of the parameter and update all callers. Signed-off-by: Richard Henderson --- target-i386/translate.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index e3b24aa..6b09dea 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -605,17 +605,17 @@ static void gen_exts(TCGMemOp ot, TCGv reg) gen_ext_tl(reg, reg, ot, true); } -static inline void gen_op_jnz_ecx(int size, int label1) +static inline void gen_op_jnz_ecx(TCGMemOp size, int label1) { tcg_gen_mov_tl(cpu_tmp0, cpu_regs[R_ECX]); - gen_extu(size + 1, cpu_tmp0); + gen_extu(size, cpu_tmp0); tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1); } -static inline void gen_op_jz_ecx(int size, int label1) +static inline void gen_op_jz_ecx(TCGMemOp size, int label1) { tcg_gen_mov_tl(cpu_tmp0, cpu_regs[R_ECX]); - gen_extu(size + 1, cpu_tmp0); + gen_extu(size, cpu_tmp0); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1); } @@ -1113,7 +1113,7 @@ static int gen_jz_ecx_string(DisasContext *s, target_ulong next_eip) l1 = gen_new_label(); l2 = gen_new_label(); - gen_op_jnz_ecx(s->aflag, l1); + gen_op_jnz_ecx(s->aflag + 1, l1); gen_set_label(l2); gen_jmp_tb(s, next_eip, 1); gen_set_label(l1); @@ -1209,7 +1209,7 @@ static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot, \ /* a loop would cause two single step exceptions if ECX = 1 \ before rep string_insn */ \ if (!s->jmp_opt) \ - gen_op_jz_ecx(s->aflag, l2); \ + gen_op_jz_ecx(s->aflag + 1, l2); \ gen_jmp(s, cur_eip); \ } @@ -1227,7 +1227,7 @@ static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot, \ gen_update_cc_op(s); \ gen_jcc1(s, (JCC_Z << 1) | (nz ^ 1), l2); \ if (!s->jmp_opt) \ - gen_op_jz_ecx(s->aflag, l2); \ + gen_op_jz_ecx(s->aflag + 1, l2); \ gen_jmp(s, cur_eip); \ } @@ -7124,16 +7124,16 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0: /* loopnz */ case 1: /* loopz */ gen_op_add_reg_im(s->aflag + 1, R_ECX, -1); - gen_op_jz_ecx(s->aflag, l3); + gen_op_jz_ecx(s->aflag + 1, l3); gen_jcc1(s, (JCC_Z << 1) | (b ^ 1), l1); break; case 2: /* loop */ gen_op_add_reg_im(s->aflag + 1, R_ECX, -1); - gen_op_jnz_ecx(s->aflag, l1); + gen_op_jnz_ecx(s->aflag + 1, l1); break; default: case 3: /* jcxz */ - gen_op_jz_ecx(s->aflag, l1); + gen_op_jz_ecx(s->aflag + 1, l1); break; } -- 1.8.3.1