From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38094) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE4f-00007k-67 for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VeE4Z-0006R3-5d for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:53 -0500 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]:56208) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE4Y-0006Qm-Th for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:47 -0500 Received: by mail-pa0-f41.google.com with SMTP id rd3so486405pab.28 for ; Wed, 06 Nov 2013 17:07:46 -0800 (PST) Received: from pebble.com (CPE-138-130-249-46.lnse4.cha.bigpond.net.au. [138.130.249.46]) by mx.google.com with ESMTPSA id xs1sm1726198pac.7.2013.11.06.17.07.42 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 17:07:43 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 7 Nov 2013 11:05:02 +1000 Message-Id: <1383786324-18415-40-git-send-email-rth@twiddle.net> In-Reply-To: <1383786324-18415-1-git-send-email-rth@twiddle.net> References: <1383786324-18415-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH for-1.8 39/61] target-i386: Tidy addr16 code in gen_lea_modrm List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Unlike the addr32, there was no bug. But we can use the same technique to reduce the number of TCG ops. Signed-off-by: Richard Henderson --- target-i386/translate.c | 34 ++++++++++++++++------------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 7024cfd..c560d56 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2030,51 +2030,49 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) break; default: case 2: - disp = cpu_lduw_code(env, s->pc); + disp = (int16_t)cpu_lduw_code(env, s->pc); s->pc += 2; break; } - switch(rm) { + + sum = cpu_A0; + switch (rm) { case 0: - gen_op_movl_A0_reg(R_EBX); - gen_op_addl_A0_reg_sN(0, R_ESI); + tcg_gen_add_tl(cpu_A0, cpu_regs[R_EBX], cpu_regs[R_ESI]); break; case 1: - gen_op_movl_A0_reg(R_EBX); - gen_op_addl_A0_reg_sN(0, R_EDI); + tcg_gen_add_tl(cpu_A0, cpu_regs[R_EBX], cpu_regs[R_EDI]); break; case 2: - gen_op_movl_A0_reg(R_EBP); - gen_op_addl_A0_reg_sN(0, R_ESI); + tcg_gen_add_tl(cpu_A0, cpu_regs[R_EBP], cpu_regs[R_ESI]); break; case 3: - gen_op_movl_A0_reg(R_EBP); - gen_op_addl_A0_reg_sN(0, R_EDI); + tcg_gen_add_tl(cpu_A0, cpu_regs[R_EBP], cpu_regs[R_EDI]); break; case 4: - gen_op_movl_A0_reg(R_ESI); + sum = cpu_regs[R_ESI]; break; case 5: - gen_op_movl_A0_reg(R_EDI); + sum = cpu_regs[R_EDI]; break; case 6: - gen_op_movl_A0_reg(R_EBP); + sum = cpu_regs[R_EBP]; break; default: case 7: - gen_op_movl_A0_reg(R_EBX); + sum = cpu_regs[R_EBX]; break; } - if (disp != 0) - gen_op_addl_A0_im(disp); + tcg_gen_addi_tl(cpu_A0, sum, disp); tcg_gen_ext16u_tl(cpu_A0, cpu_A0); no_rm: if (must_add_seg) { if (override < 0) { - if (rm == 2 || rm == 3 || rm == 6) + if (rm == 2 || rm == 3 || rm == 6) { override = R_SS; - else + } else { override = R_DS; + } } gen_op_addl_A0_seg(s, override); } -- 1.8.3.1