From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40489) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vh7t9-0001Y5-74 for qemu-devel@nongnu.org; Thu, 14 Nov 2013 20:08:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vh7t3-0003iQ-1z for qemu-devel@nongnu.org; Thu, 14 Nov 2013 20:07:59 -0500 Received: from mx1.redhat.com ([209.132.183.28]:18968) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vh7t2-0003iK-QU for qemu-devel@nongnu.org; Thu, 14 Nov 2013 20:07:52 -0500 From: Igor Mammedov Date: Fri, 15 Nov 2013 02:07:45 +0100 Message-Id: <1384477666-26885-1-git-send-email-imammedo@redhat.com> In-Reply-To: <20131114074012.GD12673@redhat.com> References: <20131114074012.GD12673@redhat.com> Subject: [Qemu-devel] [PATCH 2/2 v4] pc: add 'etc/reserved-memory-end' fw_cfg interface for SeaBIOS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, mst@redhat.com, kraxel@redhat.com, aliguori@amazon.com, afaerber@suse.de 'etc/reserved-memory-end' will allow QEMU to tell BIOS where PCI BARs mapping could safely start in high memory. Allowing BIOS to start mapping 64-bit PCI BARs at address where it wouldn't conflict with other mappings QEMU might place before it. That permits QEMU to reserve extra address space before 64-bit PCI hole for memory hotplug. Signed-off-by: Igor Mammedov --- v2: * disable 'etc/reserved-memory-end' for 1.7 and older machine types --- hw/i386/pc.c | 27 +++++++++++++++++++++++++-- hw/i386/pc_piix.c | 1 + hw/i386/pc_q35.c | 1 + hw/pci-host/piix.c | 3 ++- hw/pci-host/q35.c | 3 ++- include/hw/i386/pc.h | 11 +++++++++-- 6 files changed, 40 insertions(+), 6 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6c82ada..ba82c67 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1094,14 +1094,37 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, } /* setup pci memory address space mapping into system address space */ -void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, - MemoryRegion *pci_address_space) +void pc_pci_as_mapping_init_1_7(Object *owner, MemoryRegion *system_memory, + MemoryRegion *pci_address_space, + uint64_t reserved_memory_end) { /* Set to lower priority than RAM */ memory_region_add_subregion_overlap(system_memory, 0x0, pci_address_space, -1); } +static +void pc_pci_as_mapping_init_1_8(Object *owner, MemoryRegion *system_memory, + MemoryRegion *pci_address_space, + uint64_t reserved_memory_end) +{ + uint64_t *val; + FWCfgState *fw_cfg = fw_cfg_find(); + g_assert(fw_cfg); + /* + * Align address at 1G, this makes sure it can be exactly covered + * with a PAT entry even when using huge pages. + */ + val = g_malloc(sizeof(*val)); + *val = cpu_to_le64(ROUND_UP(reserved_memory_end, 0x1ULL << 30)); + fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val)); + + pc_pci_as_mapping_init_1_7(owner, system_memory, pci_address_space, + reserved_memory_end); +} + +pc_pci_as_mapping_init_fn pc_pci_as_mapping_init = pc_pci_as_mapping_init_1_8; + void pc_acpi_init(const char *default_dsdt) { char *filename; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 0456ab1..c0904f9 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -240,6 +240,7 @@ static void pc_init_pci(QEMUMachineInitArgs *args) static void pc_compat_1_7(QEMUMachineInitArgs *args) { + pc_pci_as_mapping_init = pc_pci_as_mapping_init_1_7; } static void pc_compat_1_6(QEMUMachineInitArgs *args) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index b18e966..c165843 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -224,6 +224,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args) static void pc_compat_1_7(QEMUMachineInitArgs *args) { + pc_pci_as_mapping_init = pc_pci_as_mapping_init_1_7; } static void pc_compat_1_6(QEMUMachineInitArgs *args) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 5d4e290..16205e7 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -351,7 +351,8 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, /* setup pci memory mapping */ pc_pci_as_mapping_init(OBJECT(f), f->system_memory, - f->pci_address_space); + f->pci_address_space, + 0x100000000ULL + above_4g_mem_size); memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", f->pci_address_space, 0xa0000, 0x20000); diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index d1792de..1293353 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -353,7 +353,8 @@ static int mch_init(PCIDevice *d) /* setup pci memory mapping */ pc_pci_as_mapping_init(OBJECT(mch), mch->system_memory, - mch->pci_address_space); + mch->pci_address_space, + 0x100000000ULL + mch->above_4g_mem_size); /* smram */ cpu_smm_register(&mch_set_smm, mch); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 8b3be3c..bf1b168 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -129,8 +129,15 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) -void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, - MemoryRegion *pci_address_space); +typedef +void (*pc_pci_as_mapping_init_fn)(Object *owner, MemoryRegion *system_memory, + MemoryRegion *pci_address_space, + uint64_t reserved_memory_end); +extern pc_pci_as_mapping_init_fn pc_pci_as_mapping_init; + +void pc_pci_as_mapping_init_1_7(Object *owner, MemoryRegion *system_memory, + MemoryRegion *pci_address_space, + uint64_t reserved_memory_end); FWCfgState *pc_memory_init(MemoryRegion *system_memory, const char *kernel_filename, -- 1.8.3.1