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From: Igor Mammedov <imammedo@redhat.com>
To: seabios@seabios.org
Cc: qemu-devel@nongnu.org, kraxel@redhat.com, mst@redhat.com
Subject: [Qemu-devel] [PATCH SeaBIOS v4] map 64-bit PCI BARs at location provided by emulator
Date: Wed, 20 Nov 2013 01:08:33 +0100	[thread overview]
Message-ID: <1384906113-10994-1-git-send-email-imammedo@redhat.com> (raw)

Currently 64-bit PCI BARs are unconditionally mapped by BIOS right
over 4G + RamSizeOver4G location, which doesn't allow to reserve
extra space before 64-bit PCI window. For memory hotplug an extra
RAM space might be reserved after present 64-bit RAM end and BIOS
should map 64-bit PCI BARs after it.

Introduce "etc/reserved-memory-end" romfile to provide BIOS a hint
where it should start mapping of 64-bit PCI BARs. If romfile is
missing, BIOS reverts to legacy behavior and starts mapping after
high memory.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
Corresponding QEMU patch is here: http://patchwork.ozlabs.org/patch/291417/

v3:
  * s/pcimem64-start/reserved-memory-end/
v2:
  * place 64-bit window behind high RAM end if "etc/pcimem64-start"
    point below it.
---
 src/fw/pciinit.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index b29db99..a714a5b 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -18,6 +18,8 @@
 #include "paravirt.h" // RamSize
 #include "string.h" // memset
 #include "util.h" // pci_setup
+#include "byteorder.h" // le64_to_cpu
+#include "romfile.h" // romfile_loadint
 
 #define PCI_DEVICE_MEM_MIN     0x1000
 #define PCI_BRIDGE_IO_MIN      0x1000
@@ -764,6 +766,15 @@ static void pci_bios_map_devices(struct pci_bus *busses)
 {
     if (pci_bios_init_root_regions(busses)) {
         struct pci_region r64_mem, r64_pref;
+        u64 ram64_end = 0x100000000ULL + RamSizeOver4G;
+        u64 base64 = le64_to_cpu(romfile_loadint("etc/reserved-memory-end",
+                                 ram64_end));
+        if (base64 < ram64_end) {
+            dprintf(1, "ignorig etc/reserved-memory-end [0x%llx] below present"
+                       " RAM, placing 64-bit PCI window behind RAM end: %llx",
+                        base64, ram64_end);
+            base64 = ram64_end;
+        }
         r64_mem.list.first = NULL;
         r64_pref.list.first = NULL;
         pci_region_migrate_64bit_entries(&busses[0].r[PCI_REGION_TYPE_MEM],
@@ -779,7 +790,7 @@ static void pci_bios_map_devices(struct pci_bus *busses)
         u64 align_mem = pci_region_align(&r64_mem);
         u64 align_pref = pci_region_align(&r64_pref);
 
-        r64_mem.base = ALIGN(0x100000000LL + RamSizeOver4G, align_mem);
+        r64_mem.base = ALIGN(base64, align_mem);
         r64_pref.base = ALIGN(r64_mem.base + sum_mem, align_pref);
         pcimem64_start = r64_mem.base;
         pcimem64_end = r64_pref.base + sum_pref;
-- 
1.8.3.1

             reply	other threads:[~2013-11-20  0:08 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-20  0:08 Igor Mammedov [this message]
2013-11-20  0:16 ` [Qemu-devel] [SeaBIOS] [PATCH SeaBIOS v4] map 64-bit PCI BARs at location provided by emulator Igor Mammedov

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