From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44995) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vj8vi-0006IR-9Z for qemu-devel@nongnu.org; Wed, 20 Nov 2013 09:39:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vj8vb-0003Gl-6T for qemu-devel@nongnu.org; Wed, 20 Nov 2013 09:38:58 -0500 Received: from mail-pa0-x236.google.com ([2607:f8b0:400e:c03::236]:61103) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vj8va-0003GH-Ub for qemu-devel@nongnu.org; Wed, 20 Nov 2013 09:38:51 -0500 Received: by mail-pa0-f54.google.com with SMTP id rd3so4266854pab.13 for ; Wed, 20 Nov 2013 06:38:49 -0800 (PST) From: Jia Liu Date: Wed, 20 Nov 2013 22:38:31 +0800 Message-Id: <1384958318-9145-1-git-send-email-proljc@gmail.com> Content-Type: text/plain; charset="utf-8" Subject: [Qemu-devel] [PULL 0/7] OpenRISC patch queue for 1.7 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com, sebastian@macke.de, aliguori@amazon.com Hi Anthony, Hi Blue, This is my OpenRISC patch queue for 1.7, it have been well tested, please pull. Thanks to Sebastian Macke, it made move optimization and fix some bugs. The following changes since commit 394cfa39ba24dd838ace1308ae24961243947fb8: Merge remote-tracking branch 'quintela/migration.next' into staging (2013-11-19 13:03:06 -0800) are available in the git repository at: git://github.com/J-Liu/qemu.git or32 for you to fetch changes up to 14a650ec25ca93a626397783d6c6e840ec2502c6: target-openrisc: Correct carry flag check of l.addc and l.addic test cases (2013-11-20 21:47:46 +0800) ---------------------------------------------------------------- Sebastian Macke (7): target-openrisc: Speed up move instruction target-openrisc: Remove unnecessary code generated by jump instructions target-openrisc: Remove executable flag for every page target-openrisc: Correct wrong epcr register in interrupt handler openrisc-timer: Reduce overhead, Separate clock update functions target-openrisc: Correct memory bounds checking for the tlb buffers target-openrisc: Correct carry flag check of l.addc and l.addic test cases hw/openrisc/cputimer.c | 29 ++++++++----- target-openrisc/cpu.h | 1 + target-openrisc/interrupt.c | 25 +++-------- target-openrisc/mmu.c | 4 +- target-openrisc/sys_helper.c | 54 +++++++++++------------ target-openrisc/translate.c | 95 +++++++++++++++++++++++------------------ tests/tcg/openrisc/test_addc.c | 8 ++-- tests/tcg/openrisc/test_addic.c | 10 +++-- 8 files changed, 119 insertions(+), 107 deletions(-)