From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46589) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VjsWs-00032q-DG for qemu-devel@nongnu.org; Fri, 22 Nov 2013 10:20:30 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VjsWk-0008W3-0O for qemu-devel@nongnu.org; Fri, 22 Nov 2013 10:20:22 -0500 Received: from mail-la0-x22c.google.com ([2a00:1450:4010:c03::22c]:48024) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VjsWj-0008Vt-PW for qemu-devel@nongnu.org; Fri, 22 Nov 2013 10:20:13 -0500 Received: by mail-la0-f44.google.com with SMTP id ep20so1082005lab.3 for ; Fri, 22 Nov 2013 07:20:12 -0800 (PST) Received: from localhost (h59ec325f.selukar.dyn.perspektivbredband.net. [89.236.50.95]) by mx.google.com with ESMTPSA id qj3sm27314999lbb.1.2013.11.22.07.20.10 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 22 Nov 2013 07:20:11 -0800 (PST) From: edgar.iglesias@gmail.com Date: Fri, 22 Nov 2013 16:15:51 +0100 Message-Id: <1385133359-13770-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [RFC PATCH 0/8] Steps towards per CPU address-spaces List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: "Edgar E. Iglesias" Hi, I'm looking at modelling a system where multiple CPUs co-exist with different views of their attached buses/devs. With this RFC series I'm trying to take small steps towards having an address-space per CPU. This is still incomplete but I would like to get comments early before changing to much. As there are no users in the tree yet, this code restructure should not result in any functional changes. Patch 6 shows an issue with circular header deps between qemu-common.h, cpu.h. I've got a branch with a possible solution to that but its very intrusive so I opted to keep that for later. Patch 8 shows a possible transform to ld*/st*_phys here only implemented for ldl_*_phys. Future work will have to transform more of the cpu_* bus accessing functions. Cheers, Edgar Edgar E. Iglesias (8): exec: Make tb_invalidate_phys_addr input an AS exec: Make iotlb_to_region input an AS exec: Always initialize MemorySection address spaces exec: Make memory_region_section_get_iotlb use section AS memory: Add MemoryListener to typedefs cpu: Add per-cpu address space exec: On AS changes, only flush affected CPU TLBs exec: Make ldl_*_phys input an AddressSpace cpu-exec.c | 5 +- cputlb.c | 4 +- exec.c | 64 +++++++++++++++-------- hw/dma/pl080.c | 9 ++-- hw/dma/sun4m_iommu.c | 3 +- hw/net/vmware_utils.h | 2 +- hw/ppc/spapr_hcall.c | 8 +-- hw/s390x/css.c | 3 +- hw/s390x/s390-virtio-bus.c | 2 +- hw/s390x/virtio-ccw.c | 5 +- hw/scsi/megasas.c | 4 +- hw/scsi/vmw_pvscsi.c | 3 +- hw/virtio/virtio.c | 3 +- include/exec/cpu-common.h | 6 +-- include/exec/cpu-defs.h | 3 ++ include/exec/exec-all.h | 5 +- include/exec/softmmu_template.h | 5 +- include/hw/ppc/spapr.h | 2 +- include/qemu/typedefs.h | 1 + include/qom/cpu.h | 2 + target-alpha/helper.h | 2 +- target-alpha/mem_helper.c | 8 +-- target-alpha/translate.c | 2 +- target-arm/helper.c | 12 ++--- target-i386/arch_memory_mapping.c | 36 ++++++------- target-i386/helper.c | 8 +-- target-i386/seg_helper.c | 4 +- target-i386/smm_helper.c | 102 +++++++++++++++++++------------------ target-i386/svm_helper.c | 26 +++++----- target-ppc/excp_helper.c | 2 +- target-ppc/mmu-hash32.h | 4 +- target-s390x/cpu.c | 2 +- target-sparc/ldst_helper.c | 6 +-- target-sparc/mmu_helper.c | 18 +++---- target-unicore32/softmmu.c | 4 +- target-xtensa/helper.c | 2 +- target-xtensa/op_helper.c | 3 +- translate-all.c | 4 +- 38 files changed, 215 insertions(+), 169 deletions(-) -- 1.7.10.4