From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39993) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmEL8-0002BQ-5W for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:02:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VmEL2-00023G-7N for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:01:58 -0500 Received: from mail-pd0-x235.google.com ([2607:f8b0:400e:c02::235]:60642) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmEL2-00023C-0Q for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:01:52 -0500 Received: by mail-pd0-f181.google.com with SMTP id p10so12830113pdj.26 for ; Thu, 28 Nov 2013 19:01:51 -0800 (PST) Received: from pebble.twiddle.net.twiddle.net ([172.56.32.137]) by mx.google.com with ESMTPSA id hw10sm98475726pbc.24.2013.11.28.19.01.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Nov 2013 19:01:50 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Fri, 29 Nov 2013 15:59:57 +1300 Message-Id: <1385694047-6116-11-git-send-email-rth@twiddle.net> In-Reply-To: <1385694047-6116-1-git-send-email-rth@twiddle.net> References: <1385694047-6116-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 10/60] target-i386: Remove gen_op_lds_T0_A0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Replace its users by gen_op_ld_v with the MO_SIGN bit set. Signed-off-by: Richard Henderson --- target-i386/translate.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 586e5af..8c3d7ae 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -576,11 +576,6 @@ static inline void gen_op_addq_A0_reg_sN(int shift, int reg) } #endif -static inline void gen_op_lds_T0_A0(DisasContext *s, int idx) -{ - tcg_gen_qemu_ld_tl(cpu_T[0], cpu_A0, s->mem_index, idx | MO_LE | MO_SIGN); -} - static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0) { tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE); @@ -5699,7 +5694,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } else { gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); if (b & 8) { - gen_op_lds_T0_A0(s, ot); + gen_op_ld_v(s, ot | MO_SIGN, cpu_T[0], cpu_A0); } else { gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); } @@ -6011,7 +6006,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, break; case 3: default: - gen_op_lds_T0_A0(s, MO_16); + gen_op_ld_v(s, MO_SW, cpu_T[0], cpu_A0); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); gen_helper_fildl_FT0(cpu_env, cpu_tmp2_i32); break; @@ -6050,7 +6045,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, break; case 3: default: - gen_op_lds_T0_A0(s, MO_16); + gen_op_ld_v(s, MO_SW, cpu_T[0], cpu_A0); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); gen_helper_fildl_ST0(cpu_env, cpu_tmp2_i32); break; @@ -7795,7 +7790,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } else { gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); if (d_ot == MO_64) { - gen_op_lds_T0_A0(s, MO_32); + gen_op_ld_v(s, MO_32 | MO_SIGN, cpu_T[0], cpu_A0); } else { gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0); } -- 1.8.3.1