From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40455) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmEMG-0004IS-8Q for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:03:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VmEM8-0002WP-Qt for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:03:08 -0500 Received: from mail-pb0-x22e.google.com ([2607:f8b0:400e:c01::22e]:43231) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmEM8-0002W5-K9 for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:03:00 -0500 Received: by mail-pb0-f46.google.com with SMTP id md12so13626413pbc.19 for ; Thu, 28 Nov 2013 19:02:59 -0800 (PST) Received: from pebble.twiddle.net.twiddle.net ([172.56.32.137]) by mx.google.com with ESMTPSA id hw10sm98475726pbc.24.2013.11.28.19.02.56 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Nov 2013 19:02:59 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Fri, 29 Nov 2013 16:00:13 +1300 Message-Id: <1385694047-6116-27-git-send-email-rth@twiddle.net> In-Reply-To: <1385694047-6116-1-git-send-email-rth@twiddle.net> References: <1385694047-6116-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 26/60] target-i386: Remove gen_op_mov*_A0_im List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Propagate the definitions into all users. In two cases, this allows us to share code between the 32-bit and 64-bit immediate moves. Signed-off-by: Richard Henderson --- target-i386/translate.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index c89a3e8..76eeaa1 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -252,18 +252,6 @@ static void gen_update_cc_op(DisasContext *s) } } -static inline void gen_op_movl_A0_im(uint32_t val) -{ - tcg_gen_movi_tl(cpu_A0, val); -} - -#ifdef TARGET_X86_64 -static inline void gen_op_movq_A0_im(int64_t val) -{ - tcg_gen_movi_tl(cpu_A0, val); -} -#endif - static inline void gen_movtl_T0_im(target_ulong val) { tcg_gen_movi_tl(cpu_T[0], val); @@ -2046,7 +2034,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) if (rm == 6) { disp = cpu_lduw_code(env, s->pc); s->pc += 2; - gen_op_movl_A0_im(disp); + tcg_gen_movi_tl(cpu_A0, disp); rm = 0; /* avoid SS override */ goto no_rm; } else { @@ -5618,7 +5606,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, if (s->aflag == 2) { offset_addr = cpu_ldq_code(env, s->pc); s->pc += 8; - gen_op_movq_A0_im(offset_addr); } else #endif { @@ -5627,8 +5614,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } else { offset_addr = insn_get(env, s, MO_16); } - gen_op_movl_A0_im(offset_addr); } + tcg_gen_movi_tl(cpu_A0, offset_addr); gen_add_A0_ds_seg(s); if ((b & 2) == 0) { gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); -- 1.8.3.1