From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41163) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmEOC-0006nl-6K for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:05:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VmEO6-0003NI-Bw for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:05:08 -0500 Received: from mail-pd0-x231.google.com ([2607:f8b0:400e:c02::231]:37314) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmEO5-0003K6-Uh for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:05:02 -0500 Received: by mail-pd0-f177.google.com with SMTP id q10so12958887pdj.36 for ; Thu, 28 Nov 2013 19:05:01 -0800 (PST) Received: from pebble.twiddle.net.twiddle.net ([172.56.32.137]) by mx.google.com with ESMTPSA id hw10sm98475726pbc.24.2013.11.28.19.04.56 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Nov 2013 19:05:00 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Fri, 29 Nov 2013 16:00:38 +1300 Message-Id: <1385694047-6116-52-git-send-email-rth@twiddle.net> In-Reply-To: <1385694047-6116-1-git-send-email-rth@twiddle.net> References: <1385694047-6116-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 51/60] target-i386: Remove gen_op_mov_reg_T1 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Replace with its definition, via Coccinelle. Signed-off-by: Richard Henderson --- target-i386/translate.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index ff0c6a9..ba43678 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -366,11 +366,6 @@ static void gen_op_mov_reg_v(TCGMemOp ot, int reg, TCGv t0) } } -static inline void gen_op_mov_reg_T1(TCGMemOp ot, int reg) -{ - gen_op_mov_reg_v(ot, reg, cpu_T[1]); -} - static inline void gen_op_mov_reg_A0(TCGMemOp size, int reg) { gen_op_mov_reg_v(size, reg, cpu_A0); @@ -4994,7 +4989,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_mov_TN_reg(ot, 0, reg); gen_op_mov_TN_reg(ot, 1, rm); gen_op_addl_T0_T1(); - gen_op_mov_reg_T1(ot, reg); + gen_op_mov_reg_v(ot, reg, cpu_T[1]); gen_op_mov_reg_v(ot, rm, cpu_T[0]); } else { gen_lea_modrm(env, s, modrm); @@ -5002,7 +4997,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_op_addl_T0_T1(); gen_op_st_v(s, ot, cpu_T[0], cpu_A0); - gen_op_mov_reg_T1(ot, reg); + gen_op_mov_reg_v(ot, reg, cpu_T[1]); } gen_op_update2_cc(); set_cc_op(s, CC_OP_ADDB + ot); @@ -5410,7 +5405,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_mov_TN_reg(ot, 0, reg); gen_op_mov_TN_reg(ot, 1, rm); gen_op_mov_reg_v(ot, rm, cpu_T[0]); - gen_op_mov_reg_T1(ot, reg); + gen_op_mov_reg_v(ot, reg, cpu_T[1]); } else { gen_lea_modrm(env, s, modrm); gen_op_mov_TN_reg(ot, 0, reg); @@ -5421,7 +5416,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_st_v(s, ot, cpu_T[0], cpu_A0); if (!(prefixes & PREFIX_LOCK)) gen_helper_unlock(); - gen_op_mov_reg_T1(ot, reg); + gen_op_mov_reg_v(ot, reg, cpu_T[1]); } break; case 0xc4: /* les Gv */ @@ -5454,7 +5449,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0); gen_movl_seg_T0(s, op, pc_start - s->cs_base); /* then put the data */ - gen_op_mov_reg_T1(ot, reg); + gen_op_mov_reg_v(ot, reg, cpu_T[1]); if (s->is_jmp) { gen_jmp_im(s->pc - s->cs_base); gen_eob(s); @@ -6162,7 +6157,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_io_start(); tcg_gen_movi_i32(cpu_tmp2_i32, val); gen_helper_in_func(ot, cpu_T[1], cpu_tmp2_i32); - gen_op_mov_reg_T1(ot, R_EAX); + gen_op_mov_reg_v(ot, R_EAX, cpu_T[1]); if (use_icount) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); @@ -6196,7 +6191,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_io_start(); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); gen_helper_in_func(ot, cpu_T[1], cpu_tmp2_i32); - gen_op_mov_reg_T1(ot, R_EAX); + gen_op_mov_reg_v(ot, R_EAX, cpu_T[1]); if (use_icount) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); -- 1.8.3.1