From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41179) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VnUgH-0005nu-Ow for qemu-devel@nongnu.org; Mon, 02 Dec 2013 09:41:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VnUg9-0005rR-6m for qemu-devel@nongnu.org; Mon, 02 Dec 2013 09:41:01 -0500 Received: from mail-qa0-x22a.google.com ([2607:f8b0:400d:c00::22a]:48586) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VnUg9-0005rM-2R for qemu-devel@nongnu.org; Mon, 02 Dec 2013 09:40:53 -0500 Received: by mail-qa0-f42.google.com with SMTP id k4so4438678qaq.1 for ; Mon, 02 Dec 2013 06:40:52 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Mon, 2 Dec 2013 15:40:28 +0100 Message-Id: <1385995228-19585-4-git-send-email-pbonzini@redhat.com> In-Reply-To: <1385994239-19016-1-git-send-email-pbonzini@redhat.com> References: <1385994239-19016-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 4/4] memory: small tweaks List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: mst@redhat.com, marcel.a@redhat.com Make adjust_endianness inline, and do not use a ctz instruction when a shift will do. Signed-off-by: Paolo Bonzini --- memory.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/memory.c b/memory.c index 495e693..d3b0dce 100644 --- a/memory.c +++ b/memory.c @@ -357,7 +357,7 @@ static bool memory_region_wrong_endianness(MemoryRegion *mr) #endif } -static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) +static inline void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) { if (memory_region_wrong_endianness(mr)) { switch (size) { @@ -378,6 +378,11 @@ static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) } } +static inline int ctz3(unsigned size) +{ + return size >> 1; +} + static void memory_region_oldmmio_read_accessor(MemoryRegion *mr, hwaddr addr, uint64_t *value, @@ -387,7 +392,7 @@ static void memory_region_oldmmio_read_accessor(MemoryRegion *mr, { uint64_t tmp; - tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); + tmp = mr->ops->old_mmio.read[ctz3(size)](mr->opaque, addr); trace_memory_region_ops_read(mr, addr, tmp, size); *value |= (tmp & mask) << shift; } @@ -417,7 +422,7 @@ static void memory_region_oldmmio_write_accessor(MemoryRegion *mr, tmp = (*value >> shift) & mask; trace_memory_region_ops_write(mr, addr, tmp, size); - mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); + mr->ops->old_mmio.write[ctz3(size)](mr->opaque, addr, tmp); } static void memory_region_write_accessor(MemoryRegion *mr, @@ -937,7 +942,7 @@ static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, if (mr->ops->read) { data = mr->ops->read(mr->opaque, addr, size); } else { - data = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); + data = mr->ops->old_mmio.read[ctz3(size)](mr->opaque, addr); } trace_memory_region_ops_read(mr, addr, data, size); return data; @@ -992,7 +997,7 @@ static void memory_region_dispatch_write1(MemoryRegion *mr, if (mr->ops->write) { mr->ops->write(mr->opaque, addr, data, size); } else { - mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, data); + mr->ops->old_mmio.write[ctz3(size)](mr->opaque, addr, data); } return; -- 1.8.4.2