From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58495) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VnZrl-0006wM-00 for qemu-devel@nongnu.org; Mon, 02 Dec 2013 15:13:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VnZrd-0003ic-JI for qemu-devel@nongnu.org; Mon, 02 Dec 2013 15:13:12 -0500 Received: from mail-wi0-f176.google.com ([209.85.212.176]:48979) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VnZrd-0003iL-EL for qemu-devel@nongnu.org; Mon, 02 Dec 2013 15:13:05 -0500 Received: by mail-wi0-f176.google.com with SMTP id hq4so5459021wib.3 for ; Mon, 02 Dec 2013 12:13:04 -0800 (PST) Received: from localhost.localdomain (cpc6-seac21-2-0-cust453.7-2.cable.virginm.net. [82.1.113.198]) by mx.google.com with ESMTPSA id e10sm103884524wiy.7.2013.12.02.12.13.03 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 02 Dec 2013 12:13:04 -0800 (PST) From: Will Newton Date: Mon, 2 Dec 2013 20:12:52 +0000 Message-Id: <1386015177-6621-2-git-send-email-will.newton@linaro.org> In-Reply-To: <1386015177-6621-1-git-send-email-will.newton@linaro.org> References: <1386015177-6621-1-git-send-email-will.newton@linaro.org> Subject: [Qemu-devel] [PATCH v7 1/6] target-arm: Move call to disas_vfp_insn out of disas_coproc_insn. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Floating point is an extension to the instruction set rather than a coprocessor, so call it directly from the ARM and Thumb decode functions. --- target-arm/translate.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) Changes in v7: - Fix comment style - Fix brace style diff --git a/target-arm/translate.c b/target-arm/translate.c index 5f003e7..f63e89d 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2636,6 +2636,14 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) && rn != ARM_VFP_MVFR1 && rn != ARM_VFP_MVFR0) return 1; } + + if (extract32(insn, 28, 4) == 0xf) { + /* Encodings with T=1 (Thumb) or unconditional (ARM): + * only used in v8 and above. + */ + return 1; + } + dp = ((insn & 0xf00) == 0xb00); switch ((insn >> 24) & 0xf) { case 0xe: @@ -6296,9 +6304,6 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) return disas_dsp_insn(env, s, insn); } return 1; - case 10: - case 11: - return disas_vfp_insn (env, s, insn); default: break; } @@ -6753,6 +6758,13 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) goto illegal_op; return; } + if ((insn & 0x0f000e10) == 0x0e000a00) { + /* VFP. */ + if (disas_vfp_insn(env, s, insn)) { + goto illegal_op; + } + return; + } if (((insn & 0x0f30f000) == 0x0510f000) || ((insn & 0x0f30f010) == 0x0710f000)) { if ((insn & (1 << 22)) == 0) { @@ -8033,9 +8045,15 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) case 0xc: case 0xd: case 0xe: - /* Coprocessor. */ - if (disas_coproc_insn(env, s, insn)) + if (((insn >> 8) & 0xe) == 10) { + /* VFP. */ + if (disas_vfp_insn(env, s, insn)) { + goto illegal_op; + } + } else if (disas_coproc_insn(env, s, insn)) { + /* Coprocessor. */ goto illegal_op; + } break; case 0xf: /* swi */ @@ -8765,6 +8783,10 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw insn = (insn & 0xe2ffffff) | ((insn & (1 << 28)) >> 4) | (1 << 28); if (disas_neon_data_insn(env, s, insn)) goto illegal_op; + } else if (((insn >> 8) & 0xe) == 10) { + if (disas_vfp_insn(env, s, insn)) { + goto illegal_op; + } } else { if (insn & (1 << 28)) goto illegal_op; -- 1.8.1.4