qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [V3 PATCH 10/14] target-ppc: VSX Stage 4: Add xssqrtsp
Date: Tue,  3 Dec 2013 09:58:21 -0600	[thread overview]
Message-ID: <1386086305-8163-11-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1386086305-8163-1-git-send-email-tommusta@gmail.com>

This patch adds the VSX Scalar Square Root Single Precision (xssqrtsp)
instruction.

The existing VSX_SQRT() macro is modified to support rounding of the
intermediate double-precision result to single-precision.

V2: Updated conversion to single precision range.

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
 target-ppc/fpu_helper.c |   13 +++++++++----
 target-ppc/helper.h     |    1 +
 target-ppc/translate.c  |    2 ++
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index b633547..34a8b66 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1969,7 +1969,7 @@ VSX_RE(xvresp, 4, float32, f32, 0, 0)
  *   fld   - vsr_t field (f32 or f64)
  *   sfprf - set FPRF
  */
-#define VSX_SQRT(op, nels, tp, fld, sfprf)                                   \
+#define VSX_SQRT(op, nels, tp, fld, sfprf, r2sp)                             \
 void helper_##op(CPUPPCState *env, uint32_t opcode)                          \
 {                                                                            \
     ppc_vsr_t xt, xb;                                                        \
@@ -1993,6 +1993,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)                          \
             }                                                                \
         }                                                                    \
                                                                              \
+        if (r2sp) {                                                          \
+            xt.fld[i] = helper_frsp(env, xt.fld[i]);                         \
+        }                                                                    \
+                                                                             \
         if (sfprf) {                                                         \
             helper_compute_fprf(env, xt.fld[i], sfprf);                      \
         }                                                                    \
@@ -2002,9 +2006,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)                          \
     helper_float_check_status(env);                                          \
 }
 
-VSX_SQRT(xssqrtdp, 1, float64, f64, 1)
-VSX_SQRT(xvsqrtdp, 2, float64, f64, 0)
-VSX_SQRT(xvsqrtsp, 4, float32, f32, 0)
+VSX_SQRT(xssqrtdp, 1, float64, f64, 1, 0)
+VSX_SQRT(xssqrtsp, 1, float64, f64, 1, 1)
+VSX_SQRT(xvsqrtdp, 2, float64, f64, 0, 0)
+VSX_SQRT(xvsqrtsp, 4, float32, f32, 0, 0)
 
 /* VSX_RSQRTE - VSX floating point reciprocal square root estimate
  *   op    - instruction mnemonic
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index b1cf3c0..0192043 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -291,6 +291,7 @@ DEF_HELPER_2(xssubsp, void, env, i32)
 DEF_HELPER_2(xsmulsp, void, env, i32)
 DEF_HELPER_2(xsdivsp, void, env, i32)
 DEF_HELPER_2(xsresp, void, env, i32)
+DEF_HELPER_2(xssqrtsp, void, env, i32)
 
 DEF_HELPER_2(xvadddp, void, env, i32)
 DEF_HELPER_2(xvsubdp, void, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c4c57a1..b9cd35b 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7346,6 +7346,7 @@ GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207)
 GEN_VSX_HELPER_2(xsmulsp, 0x00, 0x02, 0, PPC2_VSX207)
 GEN_VSX_HELPER_2(xsdivsp, 0x00, 0x03, 0, PPC2_VSX207)
 GEN_VSX_HELPER_2(xsresp, 0x14, 0x01, 0, PPC2_VSX207)
+GEN_VSX_HELPER_2(xssqrtsp, 0x16, 0x00, 0, PPC2_VSX207)
 
 GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
 GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
@@ -10159,6 +10160,7 @@ GEN_XX3FORM(xssubsp, 0x00, 0x01, PPC2_VSX207),
 GEN_XX3FORM(xsmulsp, 0x00, 0x02, PPC2_VSX207),
 GEN_XX3FORM(xsdivsp, 0x00, 0x03, PPC2_VSX207),
 GEN_XX2FORM(xsresp,  0x14, 0x01, PPC2_VSX207),
+GEN_XX2FORM(xssqrtsp,  0x16, 0x00, PPC2_VSX207),
 
 GEN_XX3FORM(xvadddp, 0x00, 0x0C, PPC2_VSX),
 GEN_XX3FORM(xvsubdp, 0x00, 0x0D, PPC2_VSX),
-- 
1.7.1

  parent reply	other threads:[~2013-12-03 15:59 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-03 15:58 [Qemu-devel] [V3 PATCH 00/14] target-ppc: VSX Stage 4 Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 01/14] target-ppc: VSX Stage 4: Add VSX 2.07 Flag Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 02/14] target-ppc: VSX Stage 4: Refactor lxsdx Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 03/14] target-ppc: VSX Stage 4: Add lxsiwax, lxsiwzx and lxsspx Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 04/14] target-ppc: VSX Stage 4: Refactor stxsdx Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 05/14] target-ppc: VSX Stage 4: Add stxsiwx and stxsspx Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 06/14] target-ppc: VSX Stage 4: Add xsaddsp and xssubsp Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 07/14] target-ppc: VSX Stage 4: Add xsmulsp Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 08/14] target-ppc: VSX Stage 4: Add xsdivsp Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 09/14] target-ppc: VSX Stage 4: Add xsresp Tom Musta
2013-12-03 15:58 ` Tom Musta [this message]
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 11/14] target-ppc: VSX Stage 4: add xsrsqrtesp Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 12/14] target-ppc: VSX Stage 4: Add Scalar SP Fused Multiply-Adds Tom Musta
2013-12-04  0:23   ` Richard Henderson
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 13/14] target-ppc: VSX Stage 4: Add xscvsxdsp and xscvuxdsp Tom Musta
2013-12-03 15:58 ` [Qemu-devel] [V3 PATCH 14/14] target-ppc: VSX Stage 4: Add xxleqv, xxlnand and xxlorc Tom Musta
2013-12-04  0:25 ` [Qemu-devel] [V3 PATCH 00/14] target-ppc: VSX Stage 4 Richard Henderson
2013-12-04 18:13   ` Tom Musta

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1386086305-8163-11-git-send-email-tommusta@gmail.com \
    --to=tommusta@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).