[Qemu-devel] [PATCH v3 00/12] target-arm: A64 decoder, foundation plus branches

[Peter Maydell <peter.maydell@linaro.org>]

Round three of the first-chunk of A64 decoder work, updated
following code review. Only patches 8 and 12 have changed
(and RTH, those are the only two still waiting for your review :-))

Contents:
 * the new decoder skeleton,
 * gdbstub support for FP insns
 * a patch from me which gives the A64 decoder its own
   gen_intermediate_code_internal() loop for simplicity
 * the branch related patches from Alex's series, inserted into
   the new decoder skeleton

These patches sit on top of the v8 KVM control patchset I posted
last week. You can find a git tree with them here:
 git://git.linaro.org/people/pmaydell/qemu-arm.git a64-first-set
web UI:
 https://git.linaro.org/gitweb?p=people/pmaydell/qemu-arm.git;a=shortlog;h=refs/heads/a64-first-set

Changes v1->v2:
 * fixed a non-prettified insn pattern format in a comment
 * flip order of goto_tbs in cond-branch, test&branch, cmp&branch
 * read_cpu_reg() now returns a (trashable) TCGv_i64 rather than
   requiring one to be passed in
Changes v2->v3:
 * provide and use new_tmp_a64() as well as new_tmp_a64_zero()
 * mark the autofreed temp array as invalid if building with TCG debug

thanks
-- PMM

Alexander Graf (7):
  target-arm: A64: add set_pc cpu method
  target-arm: A64: add stubs for a64 specific helpers
  target-arm: A64: add support for B and BL insns
  target-arm: A64: add support for BR, BLR and RET insns
  target-arm: A64: add support for conditional branches
  target-arm: A64: add support for 'test and branch' imm
  target-arm: A64: add support for compare and branch imm

Claudio Fontana (2):
  target-arm: A64: provide skeleton for a64 insn decoding
  target-arm: A64: expand decoding skeleton for system instructions

Peter Maydell (3):
  target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()
  target-arm: A64: provide functions for accessing FPCR and FPSR
  target-arm: Support fp registers in gdb stub

 configure                  |    2 +-
 gdb-xml/aarch64-fpu.xml    |   86 +++++
 target-arm/Makefile.objs   |    2 +-
 target-arm/cpu.h           |   28 ++
 target-arm/cpu64.c         |   11 +
 target-arm/helper-a64.c    |   25 ++
 target-arm/helper-a64.h    |   18 +
 target-arm/helper.c        |   48 ++-
 target-arm/helper.h        |    4 +
 target-arm/translate-a64.c |  895 +++++++++++++++++++++++++++++++++++++++++++-
 target-arm/translate.c     |   76 ++--
 target-arm/translate.h     |   25 +-
 12 files changed, 1159 insertions(+), 61 deletions(-)
 create mode 100644 gdb-xml/aarch64-fpu.xml
 create mode 100644 target-arm/helper-a64.c
 create mode 100644 target-arm/helper-a64.h

-- 
1.7.9.5