From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44699) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VovQl-0006rP-1h for qemu-devel@nongnu.org; Fri, 06 Dec 2013 08:26:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VovQj-0004ZF-N0 for qemu-devel@nongnu.org; Fri, 06 Dec 2013 08:26:54 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:43169) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VovQj-0004WM-F8 for qemu-devel@nongnu.org; Fri, 06 Dec 2013 08:26:53 -0500 From: Peter Maydell Date: Fri, 6 Dec 2013 13:19:03 +0000 Message-Id: <1386335953-28876-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1386335953-28876-1-git-send-email-peter.maydell@linaro.org> References: <1386335953-28876-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH v2 03/13] target-arm: A64: add support for ADR and ADRP List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@linaro.org, Michael Matz , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson From: Alexander Graf Add support for the instructions described in "C3.4.6 PC-rel. addressing" (ADR and ADRP). Signed-off-by: Alexander Graf [claudio: adapted to new decoder structure] Signed-off-by: Claudio Fontana Reviewed-by: Richard Henderson --- target-arm/translate-a64.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index b6cce1e..90eaf02 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -653,10 +653,31 @@ static void disas_ldst(DisasContext *s, uint32_t insn) } } -/* PC-rel. addressing */ +/* C3.4.6 PC-rel. addressing + * 31 30 29 28 24 23 5 4 0 + * +----+-------+-----------+-------------------+------+ + * | op | immlo | 1 0 0 0 0 | immhi | Rd | + * +----+-------+-----------+-------------------+------+ + */ static void disas_pc_rel_adr(DisasContext *s, uint32_t insn) { - unsupported_encoding(s, insn); + unsigned int page, rd; + uint64_t base; + int64_t offset; + + page = extract32(insn, 31, 1); + /* SignExtend(immhi:immlo) -> offset */ + offset = ((int64_t)sextract32(insn, 5, 19) << 2) | extract32(insn, 29, 2); + rd = extract32(insn, 0, 5); + base = s->pc - 4; + + if (page) { + /* ADRP (page based) */ + base &= ~0xfff; + offset <<= 12; + } + + tcg_gen_movi_i64(cpu_reg(s, rd), base + offset); } /* Add/subtract (immediate) */ -- 1.7.9.5