[Qemu-devel] [PATCH v3 5/5] spapr: define interface to fix device pathname

[Alexey Kardashevskiy <aik@ozlabs.ru>]

This defines an object with the interface to fix firmware pathnames
for devices which have @bootindex property.

This fixes SCSI disks device node names (which are wildcard nodes in
the device-tree).

This fixes PHB name from "pci" to "pci@XXXX" where XXXX is a BUID as
there is no bus on top of sPAPRPHBState where PHB firmware name could
be fixed using the BusClass::get_fw_dev_path mechanism.

This stores the boot list in the /chosen/qemu,boot-list property of
the device tree. "\n" are replaced by spaces to support OF1275.
SLOF needs an update in order to support the boot list.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
Changes:
v3:
* uses interface instead of QEMUMachine callback

v2:
* \n replaced with space as this is what SLOF expects there
* qemu,bootlist renamed to qemu,boot-list
---
 hw/ppc/spapr.c | 89 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 88 insertions(+), 1 deletion(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 7e53a5f..63e9c68 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -45,6 +45,7 @@
 #include "hw/pci/msi.h"
 
 #include "hw/pci/pci.h"
+#include "hw/scsi/scsi.h"
 
 #include "exec/address-spaces.h"
 #include "hw/usb.h"
@@ -80,6 +81,8 @@
 
 #define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))
 
+#define TYPE_SPAPR_MACHINE_FWPATH "spapr-machine-fwpath"
+
 sPAPREnvironment *spapr;
 
 int spapr_allocate_irq(int hint, bool lsi)
@@ -587,7 +590,9 @@ static void spapr_finalize_fdt(sPAPREnvironment *spapr,
                                hwaddr rtas_addr,
                                hwaddr rtas_size)
 {
-    int ret;
+    int ret, i;
+    size_t cb = 0;
+    char *bootlist;
     void *fdt;
     sPAPRPHBState *phb;
 
@@ -629,6 +634,21 @@ static void spapr_finalize_fdt(sPAPREnvironment *spapr,
         fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
     }
 
+    bootlist = get_boot_devices_list(&cb, true);
+    if (cb && bootlist) {
+        int offset = fdt_path_offset(fdt, "/chosen");
+        if (offset < 0) {
+            exit(1);
+        }
+        for (i = 0; i < cb; i++) {
+            if (bootlist[i] == '\n') {
+                bootlist[i] = ' ';
+            }
+
+        }
+        ret = fdt_setprop_string(fdt, offset, "qemu,boot-list", bootlist);
+    }
+
     if (!spapr->has_graphics) {
         spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
     }
@@ -1355,6 +1375,11 @@ static void ppc_spapr_init(QEMUMachineInitArgs *args)
                                             boot_device, kernel_cmdline,
                                             spapr->epow_irq);
     assert(spapr->fdt_skel != NULL);
+
+    /* Register the firmware path parser */
+    object_property_add_child(qdev_get_machine(), "fwpath",
+                              object_new(TYPE_SPAPR_MACHINE_FWPATH),
+                              NULL);
 }
 
 static QEMUMachine spapr_machine = {
@@ -1375,3 +1400,65 @@ static void spapr_machine_init(void)
 }
 
 machine_init(spapr_machine_init);
+
+/*
+ * Implementation of an interface to adjust firmware patch
+ * for the bootindex property handling.
+ */
+static char *spapr_get_fw_dev_path(BusState *bus, DeviceState *dev)
+{
+#define CAST(type, obj, name) \
+    ((type *)object_dynamic_cast(OBJECT(obj), (name)))
+    SCSIDevice *d = CAST(SCSIDevice,  dev, TYPE_SCSI_DEVICE);
+    sPAPRPHBState *phb = CAST(sPAPRPHBState, dev, TYPE_SPAPR_PCI_HOST_BRIDGE);
+
+    if (d) {
+        /*
+         * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
+         * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
+         * in the top 16 bits of the 64-bit LUN
+         */
+        unsigned id = 0x8000 | (d->channel << 8) | (d->id << 5) | d->lun;
+
+        return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
+                               (uint64_t)id << 48);
+    }
+
+    if (phb) {
+        /* Replace "pci" with "pci@800000020000000" */
+        return g_strdup_printf("pci@%"PRIX64, phb->buid);
+    }
+
+    return NULL;
+}
+
+static void machine_fw_class_init(ObjectClass *oc, void *data)
+{
+    MachineFWPathClass *mc = MACHINE_FWPATH_CLASS(oc);
+
+    mc->get_fw_dev_path = spapr_get_fw_dev_path;
+}
+
+static const TypeInfo machine_fw_info = {
+    .name          = TYPE_MACHINE_FWPATH,
+    .parent        = TYPE_INTERFACE,
+    .class_size    = sizeof(MachineFWPathClass),
+    .class_init    = machine_fw_class_init,
+};
+
+static const TypeInfo spapr_machine_info = {
+    .name          = TYPE_SPAPR_MACHINE_FWPATH,
+    .parent        = TYPE_OBJECT,
+    .interfaces = (InterfaceInfo[]) {
+            { TYPE_MACHINE_FWPATH },
+            { }
+    }
+};
+
+static void spapr_machine_register_types(void)
+{
+    type_register_static(&machine_fw_info);
+    type_register_static(&spapr_machine_info);
+}
+
+type_init(spapr_machine_register_types)
-- 
1.8.4.rc4