From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <aliguori@amazon.com>
Cc: Blue Swirl <blauwirbel@gmail.com>,
qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 09/37] target-arm: Provide PSCI constants to generic QEMU code
Date: Tue, 10 Dec 2013 14:43:05 +0000 [thread overview]
Message-ID: <1386686613-2390-10-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1386686613-2390-1-git-send-email-peter.maydell@linaro.org>
Provide versions of the KVM PSCI constants to non-KVM code;
this will allow us to avoid an ifdef in boards which set up
a PSCI node in the device tree.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-5-git-send-email-peter.maydell@linaro.org
---
target-arm/kvm-consts.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/target-arm/kvm-consts.h b/target-arm/kvm-consts.h
index 6f56f72..4062f11 100644
--- a/target-arm/kvm-consts.h
+++ b/target-arm/kvm-consts.h
@@ -36,6 +36,18 @@ MISMATCH_CHECK(CP_REG_SIZE_U32, KVM_REG_SIZE_U32)
MISMATCH_CHECK(CP_REG_SIZE_U64, KVM_REG_SIZE_U64)
MISMATCH_CHECK(CP_REG_ARM, KVM_REG_ARM)
+#define PSCI_FN_BASE 0x95c1ba5e
+#define PSCI_FN(n) (PSCI_FN_BASE + (n))
+#define PSCI_FN_CPU_SUSPEND PSCI_FN(0)
+#define PSCI_FN_CPU_OFF PSCI_FN(1)
+#define PSCI_FN_CPU_ON PSCI_FN(2)
+#define PSCI_FN_MIGRATE PSCI_FN(3)
+
+MISMATCH_CHECK(PSCI_FN_CPU_SUSPEND, KVM_PSCI_FN_CPU_SUSPEND)
+MISMATCH_CHECK(PSCI_FN_CPU_OFF, KVM_PSCI_FN_CPU_OFF)
+MISMATCH_CHECK(PSCI_FN_CPU_ON, KVM_PSCI_FN_CPU_ON)
+MISMATCH_CHECK(PSCI_FN_MIGRATE, KVM_PSCI_FN_MIGRATE)
+
#undef MISMATCH_CHECK
#endif
--
1.8.5
next prev parent reply other threads:[~2013-12-10 14:43 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-10 14:42 [Qemu-devel] [PULL 00/37] target-arm queue Peter Maydell
2013-12-10 14:42 ` [Qemu-devel] [PULL 01/37] integrator/cp: add support for REFCNT register Peter Maydell
2013-12-10 14:42 ` [Qemu-devel] [PULL 02/37] cpu/a9mpcore: rename timerbusdev variable Peter Maydell
2013-12-10 14:42 ` [Qemu-devel] [PULL 03/37] cpu/a9mpcore: reorder operations/declarations Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 04/37] hw/timer: Introduce ARM A9 Global Timer Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 05/37] cpu/a9mpcore: Add " Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 06/37] target-arm: Provide mechanism for getting KVM constants even if not CONFIG_KVM Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 07/37] device_tree.c: Terminate the empty reservemap in create_device_tree() Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 08/37] hw/arm/boot: Allow boards to provide an fdt blob Peter Maydell
2013-12-10 14:43 ` Peter Maydell [this message]
2013-12-10 14:43 ` [Qemu-devel] [PULL 10/37] target-arm: Add ARMCPU field for Linux device-tree 'compatible' string Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 11/37] target-arm: Allow secondary KVM CPUs to be booted via PSCI Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 12/37] hw/arm: Add 'virt' platform Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 13/37] target-arm: Don't hardcode KVM target CPU to be A15 Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 14/37] target-arm: Provide '-cpu host' when running KVM Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 15/37] hw/arm/virt: Support -cpu host Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 16/37] net/cadence_gem: Implement mac level loopback mode Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 17/37] net/cadence_gem: Update DMA rx descriptors as we process them Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 18/37] net/cadence_gem: Don't assert against 0 buffer address Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 19/37] net/cadence_gem: simplify rx buf descriptor walking Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 20/37] net/cadence_gem: Prefetch rx descriptors ASAP Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 21/37] net/cadence_gem: Implement RX descriptor match mode flags Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 22/37] net/cadence_gem: Implement SAR match bit in rx desc Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 23/37] net/cadence_gem: Implement SAR (de)activation Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 24/37] net/cadence_gem: Add missing VMSTATE_END_OF_LIST Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 25/37] net/cadence_gem: Fix rx multi-fragment packets Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 26/37] net/cadence_gem: Fix small packet FCS stripping Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 27/37] net/cadence_gem: Fix register w1c logic Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 28/37] net/cadence_gem: Improve can_receive debug printfery Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 29/37] net/cadence_gem: Don't rx packets when no rx buffer available Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 30/37] target-arm: Move call to disas_vfp_insn out of disas_coproc_insn Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 31/37] target-arm: Implement ARMv8 VSEL instruction Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 32/37] softfloat: Remove unused argument from MINMAX macro Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 33/37] softfloat: Add minNum() and maxNum() functions to softfloat Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 34/37] target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 35/37] target-arm: Implement ARMv8 SIMD " Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 36/37] target-arm: Use new qemu_ld/st opcodes Peter Maydell
2013-12-10 14:43 ` [Qemu-devel] [PULL 37/37] target-arm: fix TTBCR write masking Peter Maydell
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