From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47725) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqOXN-0006gt-6U for qemu-devel@nongnu.org; Tue, 10 Dec 2013 09:43:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqOXL-0000VW-J9 for qemu-devel@nongnu.org; Tue, 10 Dec 2013 09:43:49 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:43342) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqOXL-0000S5-Ao for qemu-devel@nongnu.org; Tue, 10 Dec 2013 09:43:47 -0500 From: Peter Maydell Date: Tue, 10 Dec 2013 14:42:59 +0000 Message-Id: <1386686613-2390-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1386686613-2390-1-git-send-email-peter.maydell@linaro.org> References: <1386686613-2390-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 03/37] cpu/a9mpcore: reorder operations/declarations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno From: Peter Crosthwaite To make it consistent for easier code reading. The order in which variables are defined and functions are called is set to match the address map ordering. The new consistent order of doing stuff is: SCU -> GIC -> MPTimer -> WDT. 0 functional change. Signed-off-by: Peter Crosthwaite Reviewed-by: Peter Maydell Message-id: 8f31398e6d9a93f57291399f269039da1a77a2b5.1385969450.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- hw/cpu/a9mpcore.c | 28 ++++++++++++++-------------- include/hw/cpu/a9mpcore.h | 2 +- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index 1123101..a38464b 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -24,12 +24,12 @@ static void a9mp_priv_initfn(Object *obj) memory_region_init(&s->container, obj, "a9mp-priv-container", 0x2000); sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container); - object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC); - qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); - object_initialize(&s->scu, sizeof(s->scu), TYPE_A9_SCU); qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default()); + object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC); + qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); + object_initialize(&s->mptimer, sizeof(s->mptimer), TYPE_ARM_MPTIMER); qdev_set_parent_bus(DEVICE(&s->mptimer), sysbus_get_default()); @@ -41,11 +41,20 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) { SysBusDevice *sbd = SYS_BUS_DEVICE(dev); A9MPPrivState *s = A9MPCORE_PRIV(dev); - DeviceState *gicdev, *scudev, *mptimerdev, *wdtdev; - SysBusDevice *mptimerbusdev, *wdtbusdev, *gicbusdev, *scubusdev; + DeviceState *scudev, *gicdev, *mptimerdev, *wdtdev; + SysBusDevice *scubusdev, *gicbusdev, *mptimerbusdev, *wdtbusdev; Error *err = NULL; int i; + scudev = DEVICE(&s->scu); + qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); + object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } + scubusdev = SYS_BUS_DEVICE(&s->scu); + gicdev = DEVICE(&s->gic); qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); @@ -62,15 +71,6 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) /* Pass through inbound GPIO lines to the GIC */ qdev_init_gpio_in(dev, a9mp_priv_set_irq, s->num_irq - 32); - scudev = DEVICE(&s->scu); - qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); - if (err != NULL) { - error_propagate(errp, err); - return; - } - scubusdev = SYS_BUS_DEVICE(&s->scu); - mptimerdev = DEVICE(&s->mptimer); qdev_prop_set_uint32(mptimerdev, "num-cpu", s->num_cpu); object_property_set_bool(OBJECT(&s->mptimer), true, "realized", &err); diff --git a/include/hw/cpu/a9mpcore.h b/include/hw/cpu/a9mpcore.h index 010489b..8eece07 100644 --- a/include/hw/cpu/a9mpcore.h +++ b/include/hw/cpu/a9mpcore.h @@ -28,8 +28,8 @@ typedef struct A9MPPrivState { MemoryRegion container; uint32_t num_irq; - GICState gic; A9SCUState scu; + GICState gic; ARMMPTimerState mptimer; ARMMPTimerState wdt; } A9MPPrivState; -- 1.8.5