[Qemu-devel] [PATCH] target-m68k: Use new qemu_ld/st opcodes

[Qemu-devel] [PATCH] target-m68k: Use new qemu_ld/st opcodes

[Richard Henderson]

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-m68k/translate.c | 59 ++++++++++++++++++++++++++-----------------------
 1 file changed, 31 insertions(+), 28 deletions(-)

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index f54b94a..6b62955 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -31,8 +31,6 @@
 
 /* Fake floating point.  */
 #define tcg_gen_mov_f64 tcg_gen_mov_i64
-#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
-#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
 
 #define DEFO32(name, offset) static TCGv QREG_##name;
 #define DEFO64(name, offset) static TCGv_i64 QREG_##name;
@@ -175,74 +173,79 @@ typedef void (*disas_proc)(CPUM68KState *env, DisasContext *s, uint16_t insn);
 
 /* Generate a load from the specified address.  Narrow values are
    sign extended to full register width.  */
-static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign)
+static TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign)
 {
-    TCGv tmp;
     int index = IS_USER(s);
+    TCGv tmp = tcg_temp_new_i32();
+    TCGMemOp mop;
+
     s->is_mem = 1;
-    tmp = tcg_temp_new_i32();
-    switch(opsize) {
+    switch (opsize) {
     case OS_BYTE:
-        if (sign)
-            tcg_gen_qemu_ld8s(tmp, addr, index);
-        else
-            tcg_gen_qemu_ld8u(tmp, addr, index);
+        mop = MO_TE | MO_8;
         break;
     case OS_WORD:
-        if (sign)
-            tcg_gen_qemu_ld16s(tmp, addr, index);
-        else
-            tcg_gen_qemu_ld16u(tmp, addr, index);
+        mop = MO_TE | MO_16;
         break;
     case OS_LONG:
     case OS_SINGLE:
-        tcg_gen_qemu_ld32u(tmp, addr, index);
+        mop = MO_TE | MO_32;
         break;
     default:
         qemu_assert(0, "bad load size");
     }
+    if (sign) {
+        mop |= MO_SIGN;
+    }
+
+    tcg_gen_qemu_ld_tl(tmp, addr, index, mop);
     gen_throws_exception = gen_last_qop;
     return tmp;
 }
 
-static inline TCGv_i64 gen_load64(DisasContext * s, TCGv addr)
+static TCGv_i64 gen_load64(DisasContext * s, TCGv addr)
 {
-    TCGv_i64 tmp;
     int index = IS_USER(s);
+    TCGv_i64 tmp = tcg_temp_new_i64();
+
     s->is_mem = 1;
-    tmp = tcg_temp_new_i64();
-    tcg_gen_qemu_ldf64(tmp, addr, index);
+    tcg_gen_qemu_ld_i64(tmp, addr, index, MO_TEQ);
     gen_throws_exception = gen_last_qop;
     return tmp;
 }
 
 /* Generate a store.  */
-static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val)
+static void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val)
 {
     int index = IS_USER(s);
+    TCGMemOp mop;
+
     s->is_mem = 1;
-    switch(opsize) {
+    switch (opsize) {
     case OS_BYTE:
-        tcg_gen_qemu_st8(val, addr, index);
+        mop = MO_TE | MO_8;
         break;
     case OS_WORD:
-        tcg_gen_qemu_st16(val, addr, index);
+        mop = MO_TE | MO_16;
         break;
     case OS_LONG:
     case OS_SINGLE:
-        tcg_gen_qemu_st32(val, addr, index);
+        mop = MO_TE | MO_32;
         break;
     default:
         qemu_assert(0, "bad store size");
     }
+
+    tcg_gen_qemu_st_tl(val, addr, index, mop);
     gen_throws_exception = gen_last_qop;
 }
 
-static inline void gen_store64(DisasContext *s, TCGv addr, TCGv_i64 val)
+static void gen_store64(DisasContext *s, TCGv addr, TCGv_i64 val)
 {
     int index = IS_USER(s);
+
     s->is_mem = 1;
-    tcg_gen_qemu_stf64(val, addr, index);
+    tcg_gen_qemu_st_i64(val, addr, index, MO_TEQ);
     gen_throws_exception = gen_last_qop;
 }
 
@@ -2229,10 +2232,10 @@ DISAS_INSN(fpu)
                     dest = FREG(i, 0);
                     if (ext & (1 << 13)) {
                         /* store */
-                        tcg_gen_qemu_stf64(dest, addr, IS_USER(s));
+                        tcg_gen_qemu_st_i64(dest, addr, IS_USER(s), MO_TEQ);
                     } else {
                         /* load */
-                        tcg_gen_qemu_ldf64(dest, addr, IS_USER(s));
+                        tcg_gen_qemu_ld_i64(dest, addr, IS_USER(s), MO_TEQ);
                     }
                     if (ext & (mask - 1))
                         tcg_gen_addi_i32(addr, addr, 8);
-- 
1.8.1.4