From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqoVg-0005Ag-QH for qemu-devel@nongnu.org; Wed, 11 Dec 2013 13:27:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqoVa-0000TB-O9 for qemu-devel@nongnu.org; Wed, 11 Dec 2013 13:27:48 -0500 Received: from mx1.redhat.com ([209.132.183.28]:26854) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqoVa-0000T2-EH for qemu-devel@nongnu.org; Wed, 11 Dec 2013 13:27:42 -0500 Date: Wed, 11 Dec 2013 20:31:13 +0200 From: "Michael S. Tsirkin" Message-ID: <1386786509-29966-21-git-send-email-mst@redhat.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: [Qemu-devel] [PULL 21/28] hpet: inverse polarity when pin above ISA_NUM_IRQS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Liu Ping Fan , Liu Ping Fan From: Liu Ping Fan According to hpet spec, hpet irq is high active. But according to ICH spec, there is inversion before the input of ioapic. So the OS will expect low active on this IRQ line. (On bare metal, if OS driver claims high active on this line, spurious irq is generated) We fold the emulation of this inversion inside the hpet logic. Signed-off-by: Liu Ping Fan Reviewed-by: Paolo Bonzini Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/timer/hpet.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 2eb75ea..0aee2c1 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set) if (!set || !timer_enabled(timer) || !hpet_enabled(timer->state)) { s->isr &= ~mask; if (!timer_fsb_route(timer)) { - qemu_irq_lower(s->irqs[route]); + /* fold the ICH PIRQ# pin's internal inversion logic into hpet */ + if (route >= ISA_NUM_IRQS) { + qemu_irq_raise(s->irqs[route]); + } else { + qemu_irq_lower(s->irqs[route]); + } } } else if (timer_fsb_route(timer)) { stl_le_phys(timer->fsb >> 32, timer->fsb & 0xffffffff); } else if (timer->config & HPET_TN_TYPE_LEVEL) { s->isr |= mask; - qemu_irq_raise(s->irqs[route]); + /* fold the ICH PIRQ# pin's internal inversion logic into hpet */ + if (route >= ISA_NUM_IRQS) { + qemu_irq_lower(s->irqs[route]); + } else { + qemu_irq_raise(s->irqs[route]); + } } else { s->isr &= ~mask; qemu_irq_pulse(s->irqs[route]); -- MST