From: Igor Mammedov <imammedo@redhat.com>
To: qemu-devel@nongnu.org
Cc: stefanha@redhat.com, mst@redhat.com, hutao@cn.fujitsu.com,
jjherne@us.ibm.com, brogers@suse.com, kraxel@redhat.com,
aliguori@amazon.com, kaneshige.kenji@jp.fujitsu.com,
chen.fan.fnst@cn.fujitsu.com, pbonzini@redhat.com,
lersek@redhat.com
Subject: [Qemu-devel] [PATCH 02/11] acpi: factor out common pm_update_sci() into acpi core
Date: Fri, 13 Dec 2013 17:22:07 +0100 [thread overview]
Message-ID: <1386951736-929-3-git-send-email-imammedo@redhat.com> (raw)
In-Reply-To: <1386951736-929-1-git-send-email-imammedo@redhat.com>
... and rename it into acpi_update_sci() since it changes
SCI on only on PM registers status.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
---
hw/acpi/core.c | 18 ++++++++++++++++++
hw/acpi/ich9.c | 23 ++---------------------
hw/acpi/piix4.c | 26 ++++----------------------
include/hw/acpi/acpi.h | 8 ++++++++
4 files changed, 32 insertions(+), 43 deletions(-)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 58308a3..79414b4 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -662,3 +662,21 @@ uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
return val;
}
+
+void acpi_update_sci(ACPIREGS *regs, qemu_irq irq)
+{
+ int sci_level, pm1a_sts;
+
+ pm1a_sts = acpi_pm1_evt_get_sts(regs);
+
+ sci_level = ((pm1a_sts &
+ regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) ||
+ ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0);
+
+ qemu_set_irq(irq, sci_level);
+
+ /* schedule a timer interruption if needed */
+ acpi_pm_tmr_update(regs,
+ (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
+ !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS));
+}
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 7e0429e..dcdef7c 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -44,29 +44,10 @@ do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
#define ICH9_DEBUG(fmt, ...) do { } while (0)
#endif
-static void pm_update_sci(ICH9LPCPMRegs *pm)
-{
- int sci_level, pm1a_sts;
-
- pm1a_sts = acpi_pm1_evt_get_sts(&pm->acpi_regs);
-
- sci_level = (((pm1a_sts & pm->acpi_regs.pm1.evt.en) &
- (ACPI_BITMASK_RT_CLOCK_ENABLE |
- ACPI_BITMASK_POWER_BUTTON_ENABLE |
- ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
- ACPI_BITMASK_TIMER_ENABLE)) != 0);
- qemu_set_irq(pm->irq, sci_level);
-
- /* schedule a timer interruption if needed */
- acpi_pm_tmr_update(&pm->acpi_regs,
- (pm->acpi_regs.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
- !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS));
-}
-
static void ich9_pm_update_sci_fn(ACPIREGS *regs)
{
ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
- pm_update_sci(pm);
+ acpi_update_sci(&pm->acpi_regs, pm->irq);
}
static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
@@ -193,7 +174,7 @@ static void pm_reset(void *opaque)
pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
}
- pm_update_sci(pm);
+ acpi_update_sci(&pm->acpi_regs, pm->irq);
}
static void pm_powerdown_req(Notifier *n, void *opaque)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index b4caeab..b6b97ce 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -112,28 +112,10 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
#define ACPI_ENABLE 0xf1
#define ACPI_DISABLE 0xf0
-static void pm_update_sci(PIIX4PMState *s)
-{
- int sci_level, pmsts;
-
- pmsts = acpi_pm1_evt_get_sts(&s->ar);
- sci_level = (((pmsts & s->ar.pm1.evt.en) &
- (ACPI_BITMASK_RT_CLOCK_ENABLE |
- ACPI_BITMASK_POWER_BUTTON_ENABLE |
- ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
- ACPI_BITMASK_TIMER_ENABLE)) != 0) ||
- ((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) != 0);
-
- qemu_set_irq(s->irq, sci_level);
- /* schedule a timer interruption if needed */
- acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
- !(pmsts & ACPI_BITMASK_TIMER_STATUS));
-}
-
static void pm_tmr_timer(ACPIREGS *ar)
{
PIIX4PMState *s = container_of(ar, PIIX4PMState, ar);
- pm_update_sci(s);
+ acpi_update_sci(&s->ar, s->irq);
}
static void apm_ctrl_changed(uint32_t val, void *arg)
@@ -577,7 +559,7 @@ static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
PIIX4PMState *s = opaque;
acpi_gpe_ioport_writeb(&s->ar, addr, val);
- pm_update_sci(s);
+ acpi_update_sci(&s->ar, s->irq);
PIIX4_DPRINTF("gpe write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, val);
}
@@ -693,7 +675,7 @@ static void piix4_cpu_hotplug_req(PIIX4PMState *s, CPUState *cpu,
} else {
g->sts[cpu_id / 8] &= ~(1 << (cpu_id % 8));
}
- pm_update_sci(s);
+ acpi_update_sci(&s->ar, s->irq);
}
static void piix4_cpu_added_req(Notifier *n, void *opaque)
@@ -767,7 +749,7 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
disable_device(s, slot);
}
- pm_update_sci(s);
+ acpi_update_sci(&s->ar, s->irq);
return 0;
}
diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h
index 6bbcb17..3e53297 100644
--- a/include/hw/acpi/acpi.h
+++ b/include/hw/acpi/acpi.h
@@ -69,6 +69,12 @@
#define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */
+#define ACPI_BITMASK_PM1_COMMON_ENABLED ( \
+ ACPI_BITMASK_RT_CLOCK_ENABLE | \
+ ACPI_BITMASK_POWER_BUTTON_ENABLE | \
+ ACPI_BITMASK_GLOBAL_LOCK_ENABLE | \
+ ACPI_BITMASK_TIMER_ENABLE)
+
/* PM1x_CNT */
#define ACPI_BITMASK_SCI_ENABLE 0x0001
#define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
@@ -160,6 +166,8 @@ void acpi_gpe_reset(ACPIREGS *ar);
void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
+void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq);
+
/* acpi.c */
extern int acpi_enabled;
extern char unsigned *acpi_tables;
--
1.8.3.1
next prev parent reply other threads:[~2013-12-13 17:12 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-13 16:22 [Qemu-devel] [PATCH 00/11] pc: CPU hotplug support for Q35 Igor Mammedov
2013-12-13 16:22 ` [Qemu-devel] [PATCH 01/11] acpi: piix4: remove not needed GPE0 mask Igor Mammedov
2013-12-19 14:16 ` Michael S. Tsirkin
2013-12-13 16:22 ` Igor Mammedov [this message]
2013-12-19 14:16 ` [Qemu-devel] [PATCH 02/11] acpi: factor out common pm_update_sci() into acpi core Michael S. Tsirkin
2013-12-13 16:22 ` [Qemu-devel] [PATCH 03/11] acpi: factor out common cpu hotplug code for PIIX4/Q35 Igor Mammedov
2013-12-19 14:14 ` Michael S. Tsirkin
2013-12-19 15:13 ` Igor Mammedov
2013-12-13 16:22 ` [Qemu-devel] [PATCH 04/11] acpi/piix4: add readonly "cpu-hotplug-io-base" property Igor Mammedov
2013-12-13 16:22 ` [Qemu-devel] [PATCH 05/11] acpi: ich9: allow guest to clear SCI rised by GPE Igor Mammedov
2013-12-19 14:16 ` Michael S. Tsirkin
2013-12-13 16:22 ` [Qemu-devel] [PATCH 06/11] acpi/ich9: add CPU hotplug handling to Q35 machine Igor Mammedov
2013-12-19 14:18 ` Michael S. Tsirkin
2013-12-19 15:17 ` Igor Mammedov
2013-12-19 15:33 ` Michael S. Tsirkin
2013-12-13 16:22 ` [Qemu-devel] [PATCH 07/11] ACPI: Q35 DSDT: fix CPU hotplug GPE0.2 handler Igor Mammedov
2013-12-13 16:22 ` [Qemu-devel] [PATCH 08/11] ACPI/DSDT-CPU: cleanup bogus comment Igor Mammedov
2013-12-13 16:22 ` [Qemu-devel] [PATCH 09/11] ACPI: move PRST OperationRegion into SSDT Igor Mammedov
2013-12-16 19:30 ` Michael S. Tsirkin
2013-12-16 20:38 ` Igor Mammedov
2013-12-16 21:13 ` Laszlo Ersek
2013-12-16 21:22 ` Laszlo Ersek
2013-12-16 21:53 ` Igor Mammedov
2013-12-17 10:39 ` Michael S. Tsirkin
2013-12-16 21:44 ` Laszlo Ersek
2013-12-16 21:59 ` Igor Mammedov
2013-12-16 22:22 ` Laszlo Ersek
2013-12-16 23:13 ` Igor Mammedov
2013-12-16 19:53 ` Michael S. Tsirkin
2013-12-16 22:15 ` Igor Mammedov
2013-12-22 14:51 ` Igor Mammedov
2013-12-23 11:26 ` Michael S. Tsirkin
2013-12-23 13:06 ` Igor Mammedov
2013-12-23 14:48 ` Michael S. Tsirkin
2013-12-23 16:24 ` Igor Mammedov
2013-12-23 16:52 ` Laszlo Ersek
2013-12-28 0:39 ` Igor Mammedov
2013-12-23 16:55 ` Michael S. Tsirkin
2013-12-13 16:22 ` [Qemu-devel] [PATCH 10/11] ACPI: set CPU hotplug io base dynamically Igor Mammedov
2013-12-13 16:22 ` [Qemu-devel] [PATCH 11/11] ACPI: update ssdt-misc.hex.generated acpi-dsdt.hex.generated q35-acpi-dsdt.hex.generated Igor Mammedov
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