From: edgar.iglesias@gmail.com
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, blauwirbel@gmail.com,
aliguori@amazon.com, pcrost@xilinx.com, pbonzini@redhat.com,
afaerber@suse.de, aurelien@aurel32.net, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v1 00/22] Steps towards per CPU address-spaces
Date: Mon, 16 Dec 2013 18:05:48 +1000 [thread overview]
Message-ID: <1387181170-23267-1-git-send-email-edgar.iglesias@gmail.com> (raw)
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Hi,
I'm looking at modeling systems where multiple CPUs co-exist with
different views of their attached buses/devs.
With this series I'm trying to take some steps towards having
an address-space per CPU. It's not complete but good enough for
making it possible to model (to some extent) CPU local memories
for MicroBlaze systems in emulation mode (tcg). I'm updating the
petalogix-ml605 here and will follow-up later with the petalogix-s3adsp.
There is lots of future work needed, for example to transform more of
the cpu_* bus accessing functions. To add more usage of AddressSpace
properties to pass on address spaces to DMA models. Qtest mechanisms
to target specific address spaces, etc...
Cheers,
Edgar
Edgar E. Iglesias (22):
exec: Make tb_invalidate_phys_addr input an AS
exec: Make iotlb_to_region input an AS
exec: Always initialize MemorySection address spaces
exec: Make memory_region_section_get_iotlb use section AS
memory: Add MemoryListener to typedefs.h
memory: Add address_space_find_by_name()
qdev: Add qdev property type for AddressSpaces
cpu: Add per-cpu address space
target-microblaze: Add address-space property
exec: On AS changes, only flush affected CPU TLBs
exec: Make ldl_*_phys input an AddressSpace
exec: Make ldq/ldub_*_phys input an AddressSpace
exec: Make lduw_*_phys input an AddressSpace
exec: Make stq_*_phys input an AddressSpace
exec: Make stl_*_phys input an AddressSpace
exec: Make stl_phys_notdirty input an AddressSpace
exec: Make stw_*_phys input an AddressSpace
exec: Make stb_phys input an AddressSpace
exec: Make cpu_physical_memory_write_rom input an AS
exec: Make cpu_memory_rw_debug use the CPUs AS
petalogix-ml605: Create the CPU with object_new()
petalogix-ml605: Make the LMB visible only to the CPU
cpu-exec.c | 5 +-
cputlb.c | 4 +-
exec.c | 176 ++++++++++++---------
hw/alpha/dp264.c | 5 +-
hw/alpha/typhoon.c | 2 +-
hw/arm/boot.c | 9 +-
hw/arm/highbank.c | 6 +-
hw/core/loader.c | 3 +-
hw/core/qdev-properties-system.c | 46 ++++++
hw/display/sm501.c | 1 +
hw/display/sm501_template.h | 2 +-
hw/dma/pl080.c | 9 +-
hw/dma/sun4m_iommu.c | 3 +-
hw/intc/apic.c | 3 +-
hw/microblaze/petalogix_ml605_mmu.c | 28 +++-
hw/net/vmware_utils.h | 16 +-
hw/pci/msi.c | 2 +-
hw/pci/msix.c | 2 +-
hw/ppc/ppc405_uc.c | 44 +++---
hw/ppc/spapr_hcall.c | 42 ++---
hw/s390x/css.c | 11 +-
hw/s390x/s390-virtio-bus.c | 36 +++--
hw/s390x/s390-virtio.c | 2 +-
hw/s390x/virtio-ccw.c | 40 +++--
hw/scsi/megasas.c | 22 ++-
hw/scsi/vmw_pvscsi.c | 6 +-
hw/sh4/r2d.c | 4 +-
hw/sparc/sun4m.c | 3 +-
hw/timer/hpet.c | 3 +-
hw/virtio/virtio.c | 31 ++--
include/exec/cpu-common.h | 44 +++---
include/exec/cpu-defs.h | 3 +
include/exec/exec-all.h | 5 +-
include/exec/memory.h | 10 +-
include/exec/softmmu_template.h | 5 +-
include/hw/ppc/spapr.h | 4 +-
include/hw/qdev-properties.h | 5 +
include/qemu/typedefs.h | 1 +
include/qom/cpu.h | 2 +
memory.c | 12 ++
monitor.c | 2 +-
target-alpha/helper.c | 6 +-
target-alpha/helper.h | 8 +-
target-alpha/mem_helper.c | 28 ++--
target-alpha/translate.c | 8 +-
target-arm/helper.c | 16 +-
target-i386/arch_memory_mapping.c | 46 +++---
target-i386/helper.c | 47 +++---
target-i386/seg_helper.c | 12 +-
target-i386/smm_helper.c | 298 ++++++++++++++++++-----------------
target-i386/svm_helper.c | 291 ++++++++++++++++++++--------------
target-microblaze/cpu.c | 14 ++
target-ppc/excp_helper.c | 2 +-
target-ppc/mmu-hash32.h | 8 +-
target-ppc/mmu-hash64.h | 10 +-
target-s390x/cpu.c | 2 +-
target-s390x/helper.c | 8 +-
target-s390x/mem_helper.c | 6 +-
target-sparc/ldst_helper.c | 68 ++++----
target-sparc/mmu_helper.c | 20 +--
target-unicore32/softmmu.c | 4 +-
target-xtensa/helper.c | 2 +-
target-xtensa/op_helper.c | 3 +-
translate-all.c | 4 +-
64 files changed, 906 insertions(+), 664 deletions(-)
--
1.7.10.4
next reply other threads:[~2013-12-16 8:06 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-16 8:05 edgar.iglesias [this message]
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 01/22] exec: Make tb_invalidate_phys_addr input an AS edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 02/22] exec: Make iotlb_to_region " edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 03/22] exec: Always initialize MemorySection address spaces edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 04/22] exec: Make memory_region_section_get_iotlb use section AS edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 05/22] memory: Add MemoryListener to typedefs.h edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 06/22] memory: Add address_space_find_by_name() edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 07/22] qdev: Add qdev property type for AddressSpaces edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 08/22] cpu: Add per-cpu address space edgar.iglesias
2013-12-16 12:11 ` Andreas Färber
2013-12-17 0:34 ` Edgar E. Iglesias
2013-12-17 0:54 ` Peter Maydell
2013-12-17 0:57 ` Peter Crosthwaite
2013-12-17 1:01 ` Edgar E. Iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 09/22] target-microblaze: Add address-space property edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 10/22] exec: On AS changes, only flush affected CPU TLBs edgar.iglesias
2013-12-16 12:54 ` Andreas Färber
2013-12-17 0:57 ` Edgar E. Iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 11/22] exec: Make ldl_*_phys input an AddressSpace edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 12/22] exec: Make ldq/ldub_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 13/22] exec: Make lduw_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 14/22] exec: Make stq_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 15/22] exec: Make stl_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 16/22] exec: Make stl_phys_notdirty " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 17/22] exec: Make stw_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 18/22] exec: Make stb_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 19/22] exec: Make cpu_physical_memory_write_rom input an AS edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 20/22] exec: Make cpu_memory_rw_debug use the CPUs AS edgar.iglesias
2013-12-16 12:48 ` Andreas Färber
2013-12-17 0:52 ` Edgar E. Iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 21/22] petalogix-ml605: Create the CPU with object_new() edgar.iglesias
2013-12-16 12:14 ` Andreas Färber
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 22/22] petalogix-ml605: Make the LMB visible only to the CPU edgar.iglesias
2013-12-16 12:46 ` Andreas Färber
2013-12-16 13:29 ` Peter Maydell
2013-12-16 13:44 ` Andreas Färber
2013-12-16 13:51 ` Peter Maydell
2013-12-16 14:03 ` Andreas Färber
2013-12-16 15:09 ` Peter Maydell
2013-12-17 1:24 ` Edgar E. Iglesias
2013-12-17 1:36 ` Edgar E. Iglesias
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