From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55099) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VsTP0-0003KX-Oz for qemu-devel@nongnu.org; Mon, 16 Dec 2013 03:19:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VsTOu-0006YO-Tm for qemu-devel@nongnu.org; Mon, 16 Dec 2013 03:19:46 -0500 Received: from mail-pb0-x230.google.com ([2607:f8b0:400e:c01::230]:34135) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VsTOu-0006YB-MY for qemu-devel@nongnu.org; Mon, 16 Dec 2013 03:19:40 -0500 Received: by mail-pb0-f48.google.com with SMTP id md12so5161442pbc.7 for ; Mon, 16 Dec 2013 00:19:39 -0800 (PST) From: edgar.iglesias@gmail.com Date: Mon, 16 Dec 2013 18:06:10 +1000 Message-Id: <1387181170-23267-23-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1387181170-23267-1-git-send-email-edgar.iglesias@gmail.com> References: <1387181170-23267-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v1 22/22] petalogix-ml605: Make the LMB visible only to the CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, blauwirbel@gmail.com, aliguori@amazon.com, pcrost@xilinx.com, pbonzini@redhat.com, afaerber@suse.de, aurelien@aurel32.net, rth@twiddle.net From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- hw/microblaze/petalogix_ml605_mmu.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index 4009ff5..0a13b0e 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -88,10 +88,18 @@ petalogix_ml605_init(QEMUMachineInitArgs *args) hwaddr ddr_base = MEMORY_BASEADDR; MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1); MemoryRegion *phys_ram = g_new(MemoryRegion, 1); + MemoryRegion *sysmem_alias = g_new(MemoryRegion, 1); + MemoryRegion *mr_cpu_root = g_new(MemoryRegion, 1); + AddressSpace *as_cpu = g_malloc0(sizeof(*as_cpu)); qemu_irq irq[32], *cpu_irq; + /* Setup the CPU specific address-space. */ + memory_region_init(mr_cpu_root, NULL, "as-cpu-root", INT64_MAX); + address_space_init(as_cpu, mr_cpu_root, "as/cpu"); + /* init CPUs */ cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU)); + qdev_prop_set_address_space(DEVICE(cpu), "address-space", as_cpu); object_property_set_bool(OBJECT(cpu), true, "realized", &err); if (err) { error_report("%s", error_get_pretty(err)); @@ -100,11 +108,18 @@ petalogix_ml605_init(QEMUMachineInitArgs *args) env = &cpu->env; + /* Populate the CPU AS with the LMB only visible to the CPU. */ + memory_region_init_alias(sysmem_alias, NULL, "sysmem_alias", + address_space_mem, 0, + memory_region_size(address_space_mem)); + memory_region_add_subregion(mr_cpu_root, 0x00000000, sysmem_alias); + /* Attach emulated BRAM through the LMB. */ memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram", LMB_BRAM_SIZE); vmstate_register_ram_global(phys_lmb_bram); - memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram); + memory_region_add_subregion_overlap(mr_cpu_root, 0x00000000, + phys_lmb_bram, 2); memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size); vmstate_register_ram_global(phys_ram); -- 1.7.10.4