From: edgar.iglesias@gmail.com
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, blauwirbel@gmail.com,
aliguori@amazon.com, pcrost@xilinx.com, pbonzini@redhat.com,
afaerber@suse.de, aurelien@aurel32.net, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v1 08/22] cpu: Add per-cpu address space
Date: Mon, 16 Dec 2013 18:05:56 +1000 [thread overview]
Message-ID: <1387181170-23267-9-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1387181170-23267-1-git-send-email-edgar.iglesias@gmail.com>
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
cputlb.c | 4 ++--
exec.c | 31 +++++++++++++++++++++++--------
include/exec/cpu-defs.h | 3 +++
include/exec/exec-all.h | 1 +
include/exec/softmmu_template.h | 4 ++--
include/qom/cpu.h | 2 ++
6 files changed, 33 insertions(+), 12 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 0399172..a2264a3 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -254,7 +254,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
}
sz = size;
- section = address_space_translate_for_iotlb(&address_space_memory, paddr,
+ section = address_space_translate_for_iotlb(env->as, paddr,
&xlat, &sz);
assert(sz >= TARGET_PAGE_SIZE);
@@ -327,7 +327,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
cpu_ldub_code(env1, addr);
}
pd = env1->iotlb[mmu_idx][page_index] & ~TARGET_PAGE_MASK;
- mr = iotlb_to_region(&address_space_memory, pd);
+ mr = iotlb_to_region(env1->as, pd);
if (memory_region_is_unassigned(mr)) {
CPUState *cpu = ENV_GET_CPU(env1);
CPUClass *cc = CPU_GET_CLASS(cpu);
diff --git a/exec.c b/exec.c
index 803bbde..edb6a43 100644
--- a/exec.c
+++ b/exec.c
@@ -136,6 +136,7 @@ typedef struct subpage_t {
static void io_mem_init(void);
static void memory_map_init(void);
+static void tcg_commit(MemoryListener *listener);
static MemoryRegion io_mem_watch;
#endif
@@ -434,6 +435,25 @@ CPUState *qemu_get_cpu(int index)
return NULL;
}
+#if !defined(CONFIG_USER_ONLY)
+void cpu_address_space_init(CPUState *cpu, AddressSpace *as)
+{
+ CPUArchState *env = cpu->env_ptr;
+
+ if (tcg_enabled()) {
+ if (cpu->tcg_as_listener) {
+ memory_listener_unregister(cpu->tcg_as_listener);
+ } else {
+ cpu->tcg_as_listener = g_new0(MemoryListener, 1);
+ }
+ cpu->tcg_as_listener->commit = tcg_commit;
+ memory_listener_register(cpu->tcg_as_listener, as);
+ }
+
+ env->as = as;
+}
+#endif
+
void cpu_exec_init(CPUArchState *env)
{
CPUState *cpu = ENV_GET_CPU(env);
@@ -453,6 +473,7 @@ void cpu_exec_init(CPUArchState *env)
QTAILQ_INIT(&env->breakpoints);
QTAILQ_INIT(&env->watchpoints);
#ifndef CONFIG_USER_ONLY
+ cpu_address_space_init(cpu, &address_space_memory);
cpu->thread_id = qemu_get_thread_id();
#endif
QTAILQ_INSERT_TAIL(&cpus, cpu, node);
@@ -482,9 +503,10 @@ static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
#else
static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
{
+ CPUArchState *env = cpu->env_ptr;
hwaddr phys = cpu_get_phys_page_debug(cpu, pc);
if (phys != -1) {
- tb_invalidate_phys_addr(&address_space_memory,
+ tb_invalidate_phys_addr(env->as,
phys | (pc & ~TARGET_PAGE_MASK));
}
}
@@ -1810,10 +1832,6 @@ static MemoryListener core_memory_listener = {
.priority = 1,
};
-static MemoryListener tcg_memory_listener = {
- .commit = tcg_commit,
-};
-
void address_space_init_dispatch(AddressSpace *as)
{
as->dispatch = NULL;
@@ -1849,9 +1867,6 @@ static void memory_map_init(void)
address_space_init(&address_space_io, system_io, "I/O");
memory_listener_register(&core_memory_listener, &address_space_memory);
- if (tcg_enabled()) {
- memory_listener_register(&tcg_memory_listener, &address_space_memory);
- }
}
MemoryRegion *get_system_memory(void)
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 01cd8c7..406b36c 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -176,6 +176,9 @@ typedef struct CPUWatchpoint {
sigjmp_buf jmp_env; \
int exception_index; \
\
+ /* Per CPU address-space. */ \
+ AddressSpace *as; \
+ \
/* user data */ \
void *opaque; \
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 6129365..61770ee 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -95,6 +95,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access);
#if !defined(CONFIG_USER_ONLY)
+void cpu_address_space_init(CPUState *cpu, AddressSpace *as);
/* cputlb.c */
void tlb_flush_page(CPUArchState *env, target_ulong addr);
void tlb_flush(CPUArchState *env, int flush_global);
diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
index 69d856a..1dacb4d 100644
--- a/include/exec/softmmu_template.h
+++ b/include/exec/softmmu_template.h
@@ -119,7 +119,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
uintptr_t retaddr)
{
uint64_t val;
- MemoryRegion *mr = iotlb_to_region(&address_space_memory, physaddr);
+ MemoryRegion *mr = iotlb_to_region(env->as, physaddr);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
env->mem_io_pc = retaddr;
@@ -325,7 +325,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
target_ulong addr,
uintptr_t retaddr)
{
- MemoryRegion *mr = iotlb_to_region(&address_space_memory, physaddr);
+ MemoryRegion *mr = iotlb_to_region(env->as, physaddr);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
if (mr != &io_mem_rom && mr != &io_mem_notdirty && !can_do_io(env)) {
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 7739e00..c1febae 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -186,6 +186,8 @@ struct CPUState {
uint32_t interrupt_request;
int singlestep_enabled;
+ MemoryListener *tcg_as_listener;
+
void *env_ptr; /* CPUArchState */
struct TranslationBlock *current_tb;
struct GDBRegisterState *gdb_regs;
--
1.7.10.4
next prev parent reply other threads:[~2013-12-16 8:11 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-16 8:05 [Qemu-devel] [PATCH v1 00/22] Steps towards per CPU address-spaces edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 01/22] exec: Make tb_invalidate_phys_addr input an AS edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 02/22] exec: Make iotlb_to_region " edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 03/22] exec: Always initialize MemorySection address spaces edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 04/22] exec: Make memory_region_section_get_iotlb use section AS edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 05/22] memory: Add MemoryListener to typedefs.h edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 06/22] memory: Add address_space_find_by_name() edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 07/22] qdev: Add qdev property type for AddressSpaces edgar.iglesias
2013-12-16 8:05 ` edgar.iglesias [this message]
2013-12-16 12:11 ` [Qemu-devel] [PATCH v1 08/22] cpu: Add per-cpu address space Andreas Färber
2013-12-17 0:34 ` Edgar E. Iglesias
2013-12-17 0:54 ` Peter Maydell
2013-12-17 0:57 ` Peter Crosthwaite
2013-12-17 1:01 ` Edgar E. Iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 09/22] target-microblaze: Add address-space property edgar.iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 10/22] exec: On AS changes, only flush affected CPU TLBs edgar.iglesias
2013-12-16 12:54 ` Andreas Färber
2013-12-17 0:57 ` Edgar E. Iglesias
2013-12-16 8:05 ` [Qemu-devel] [PATCH v1 11/22] exec: Make ldl_*_phys input an AddressSpace edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 12/22] exec: Make ldq/ldub_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 13/22] exec: Make lduw_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 14/22] exec: Make stq_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 15/22] exec: Make stl_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 16/22] exec: Make stl_phys_notdirty " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 17/22] exec: Make stw_*_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 18/22] exec: Make stb_phys " edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 19/22] exec: Make cpu_physical_memory_write_rom input an AS edgar.iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 20/22] exec: Make cpu_memory_rw_debug use the CPUs AS edgar.iglesias
2013-12-16 12:48 ` Andreas Färber
2013-12-17 0:52 ` Edgar E. Iglesias
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 21/22] petalogix-ml605: Create the CPU with object_new() edgar.iglesias
2013-12-16 12:14 ` Andreas Färber
2013-12-16 8:06 ` [Qemu-devel] [PATCH v1 22/22] petalogix-ml605: Make the LMB visible only to the CPU edgar.iglesias
2013-12-16 12:46 ` Andreas Färber
2013-12-16 13:29 ` Peter Maydell
2013-12-16 13:44 ` Andreas Färber
2013-12-16 13:51 ` Peter Maydell
2013-12-16 14:03 ` Andreas Färber
2013-12-16 15:09 ` Peter Maydell
2013-12-17 1:24 ` Edgar E. Iglesias
2013-12-17 1:36 ` Edgar E. Iglesias
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