From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59438) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vt1i6-00028T-27 for qemu-devel@nongnu.org; Tue, 17 Dec 2013 15:57:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vt1i4-0003EF-9c for qemu-devel@nongnu.org; Tue, 17 Dec 2013 15:57:45 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:43648) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vt1i3-0002q7-A8 for qemu-devel@nongnu.org; Tue, 17 Dec 2013 15:57:43 -0500 From: Peter Maydell Date: Tue, 17 Dec 2013 20:28:35 +0000 Message-Id: <1387312160-12318-18-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1387312160-12318-1-git-send-email-peter.maydell@linaro.org> References: <1387312160-12318-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 17/62] ARM: cpu: add "reset_hivecs" property List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno From: Antony Pavlov Add an ARM CPU property for the reset value of hivecs as it is a board/SoC configurable setting. The existence of the property is conditional on the ARM CPU not being M class. Signed-off-by: Antony Pavlov Signed-off-by: Peter Crosthwaite Message-id: b04216c6bda4bd163f44a55bba552d0e8267481f.1387160489.git.peter.crosthwaite@xilinx.com [ PC Changes: * Elaborated commit message * refactored to use qdev_property_add_static ] Signed-off-by: Peter Crosthwaite Signed-off-by: Peter Maydell --- target-arm/cpu-qom.h | 1 + target-arm/cpu.c | 13 +++++++++++++ 2 files changed, 14 insertions(+) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index f32178a..afbd422 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -139,6 +139,7 @@ typedef struct ARMCPU { uint32_t ccsidr[16]; uint32_t reset_cbar; uint32_t reset_auxcr; + bool reset_hivecs; } ARMCPU; #define TYPE_AARCH64_CPU "aarch64-cpu" diff --git a/target-arm/cpu.c b/target-arm/cpu.c index fd04b36..3bce1d6 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -235,6 +235,9 @@ static void arm_cpu_initfn(Object *obj) static Property arm_cpu_reset_cbar_property = DEFINE_PROP_UINT32("reset-cbar", ARMCPU, reset_cbar, 0); +static Property arm_cpu_reset_hivecs_property = + DEFINE_PROP_BOOL("reset-hivecs", ARMCPU, reset_hivecs, false); + static void arm_cpu_post_init(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -245,6 +248,12 @@ static void arm_cpu_post_init(Object *obj) &err); assert_no_error(err); } + + if (!arm_feature(&cpu->env, ARM_FEATURE_M)) { + qdev_property_add_static(DEVICE(obj), &arm_cpu_reset_hivecs_property, + &err); + assert_no_error(err); + } } static void arm_cpu_finalizefn(Object *obj) @@ -307,6 +316,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) set_feature(env, ARM_FEATURE_PXN); } + if (cpu->reset_hivecs) { + cpu->reset_sctlr |= (1 << 13); + } + register_cp_regs_for_features(cpu); arm_cpu_register_gdb_regs_for_features(cpu); -- 1.8.5