From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59436) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vt1i5-00028Q-W0 for qemu-devel@nongnu.org; Tue, 17 Dec 2013 15:57:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vt1i4-0003EW-DS for qemu-devel@nongnu.org; Tue, 17 Dec 2013 15:57:45 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:43649) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vt1i4-00038y-60 for qemu-devel@nongnu.org; Tue, 17 Dec 2013 15:57:44 -0500 From: Peter Maydell Date: Tue, 17 Dec 2013 20:28:36 +0000 Message-Id: <1387312160-12318-19-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1387312160-12318-1-git-send-email-peter.maydell@linaro.org> References: <1387312160-12318-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 18/62] ARM: arm_cpu_reset: make it possible to use high vectors for reset_exc List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno From: Antony Pavlov If hivecs are being used on reset, the CPU should come out of reset at the hivecs reset vector (0xFFFF0000) Signed-off-by: Antony Pavlov Signed-off-by: Peter Crosthwaite Message-id: 3afc69c4f58f60aa2bbee7b91574a4eb414b1c23.1387160489.git.peter.crosthwaite@xilinx.com [ PC Changes: * Fixed Grammar error in commit message * Elaborated commit message. ] Signed-off-by: Peter Crosthwaite Signed-off-by: Peter Maydell --- target-arm/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 3bce1d6..8288c7d 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -121,6 +121,11 @@ static void arm_cpu_reset(CPUState *s) env->regs[15] = pc & ~1; } } + + if (env->cp15.c1_sys & (1 << 13)) { + env->regs[15] = 0xFFFF0000; + } + env->vfp.xregs[ARM_VFP_FPEXC] = 0; #endif set_flush_to_zero(1, &env->vfp.standard_fp_status); -- 1.8.5