From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [V4 PATCH 01/22] softfloat: Fix float64_to_uint64
Date: Wed, 18 Dec 2013 14:19:00 -0600 [thread overview]
Message-ID: <1387397961-4894-2-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1387397961-4894-1-git-send-email-tommusta@gmail.com>
The comment preceding the float64_to_uint64 routine suggests that
the implementation is broken. And this is, indeed, the case.
This patch properly implements the conversion of a 64-bit floating
point number to an unsigned, 64 bit integer.
This contribution can be licensed under either the softfloat-2a or -2b
license.
V2: Added softfloat license statement.
V3: Modified to meet QEMU coding conventions.
V4: Fixed incorrect handling of small negatives, which, if rounded
up to zero should not set the inexact flag.
Signed-off-by: Tom Musta <tommusta@gmail.com>
---
fpu/softfloat.c | 98 +++++++++++++++++++++++++++++++++++++++++++++++++-----
1 files changed, 89 insertions(+), 9 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index dbda61b..ec23908 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -161,7 +161,6 @@ static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM)
| exception is raised and the largest positive or negative integer is
| returned.
*----------------------------------------------------------------------------*/
-
static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM)
{
int8 roundingMode;
@@ -204,6 +203,56 @@ static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATU
}
/*----------------------------------------------------------------------------
+| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
+| `absZ1', with binary point between bits 63 and 64 (between the input words),
+| and returns the properly rounded 64-bit unsigned integer corresponding to the
+| input. Ordinarily, the fixed-point input is simply rounded to an integer,
+| with the inexact exception raised if the input cannot be represented exactly
+| as an integer. However, if the fixed-point input is too large, the invalid
+| exception is raised and the largest unsigned integer is returned.
+*----------------------------------------------------------------------------*/
+
+static int64 roundAndPackUint64(flag zSign, uint64_t absZ0,
+ uint64_t absZ1 STATUS_PARAM)
+{
+ int8 roundingMode;
+ flag roundNearestEven, increment;
+
+ roundingMode = STATUS(float_rounding_mode);
+ roundNearestEven = (roundingMode == float_round_nearest_even);
+ increment = ((int64_t)absZ1 < 0);
+ if (!roundNearestEven) {
+ if (roundingMode == float_round_to_zero) {
+ increment = 0;
+ } else if (absZ1) {
+ if (zSign) {
+ increment = (roundingMode == float_round_down) && absZ1;
+ } else {
+ increment = (roundingMode == float_round_up) && absZ1;
+ }
+ }
+ }
+ if (increment) {
+ ++absZ0;
+ if (absZ0 == 0) {
+ float_raise(float_flag_invalid STATUS_VAR);
+ return LIT64(0xFFFFFFFFFFFFFFFF);
+ }
+ absZ0 &= ~(((uint64_t)(absZ1<<1) == 0) & roundNearestEven);
+ }
+
+ if (zSign && absZ0) {
+ float_raise(float_flag_invalid STATUS_VAR);
+ return 0;
+ }
+
+ if (absZ1) {
+ STATUS(float_exception_flags) |= float_flag_inexact;
+ }
+ return absZ0;
+}
+
+/*----------------------------------------------------------------------------
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
@@ -6536,18 +6585,49 @@ uint_fast16_t float64_to_uint16_round_to_zero(float64 a STATUS_PARAM)
return res;
}
-/* FIXME: This looks broken. */
-uint64_t float64_to_uint64 (float64 a STATUS_PARAM)
-{
- int64_t v;
+/*----------------------------------------------------------------------------
+| Returns the result of converting the double-precision floating-point value
+| `a' to the 64-bit unsigned integer format. The conversion is
+| performed according to the IEC/IEEE Standard for Binary Floating-Point
+| Arithmetic---which means in particular that the conversion is rounded
+| according to the current rounding mode. If `a' is a NaN, the largest
+| positive integer is returned. If the conversion overflows, the
+| largest unsigned integer is returned. If 'a' is negative, zero is
+| returned.
+*----------------------------------------------------------------------------*/
- v = float64_val(int64_to_float64(INT64_MIN STATUS_VAR));
- v += float64_val(a);
- v = float64_to_int64(make_float64(v) STATUS_VAR);
+uint64_t float64_to_uint64(float64 a STATUS_PARAM)
+{
+ flag aSign;
+ int_fast16_t aExp, shiftCount;
+ uint64_t aSig, aSigExtra;
+ a = float64_squash_input_denormal(a STATUS_VAR);
- return v - INT64_MIN;
+ aSig = extractFloat64Frac(a);
+ aExp = extractFloat64Exp(a);
+ aSign = extractFloat64Sign(a);
+ if (aSign && (aExp > 1022)) {
+ float_raise(float_flag_invalid STATUS_VAR);
+ return 0;
+ }
+ if (aExp) {
+ aSig |= LIT64(0x0010000000000000);
+ }
+ shiftCount = 0x433 - aExp;
+ if (shiftCount <= 0) {
+ if (0x43E < aExp) {
+ float_raise(float_flag_invalid STATUS_VAR);
+ return LIT64(0xFFFFFFFFFFFFFFFF);
+ }
+ aSigExtra = 0;
+ aSig <<= -shiftCount;
+ } else {
+ shift64ExtraRightJamming(aSig, 0, shiftCount, &aSig, &aSigExtra);
+ }
+ return roundAndPackUint64(aSign, aSig, aSigExtra STATUS_VAR);
}
+
uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM)
{
int64_t v;
--
1.7.1
next prev parent reply other threads:[~2013-12-18 20:20 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-18 20:18 [Qemu-devel] [V4 PATCH 00/22] PowerPC VSX Stage 3 Tom Musta
2013-12-18 20:19 ` Tom Musta [this message]
2013-12-19 22:11 ` [Qemu-devel] [V4 PATCH 01/22] softfloat: Fix float64_to_uint64 Peter Maydell
2013-12-20 20:05 ` [Qemu-devel] [Qemu-ppc] " Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 02/22] softfloat: Add float32_to_uint64() Tom Musta
2013-12-19 21:31 ` Peter Maydell
2013-12-20 20:07 ` Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 03/22] softfloat: Fix float64_to_uint64_round_to_zero Tom Musta
2013-12-19 21:43 ` Peter Maydell
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 04/22] softfloat: Fix float64_to_uint32 Tom Musta
2013-12-19 21:48 ` Peter Maydell
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 05/22] softfloat: Fix float64_to_uint32_round_to_zero Tom Musta
2013-12-19 21:41 ` Peter Maydell
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 06/22] target-ppc: Add set_fprf Argument to fload_invalid_op_excp() Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 07/22] target-ppc: General Support for VSX Helpers Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 08/22] target-ppc: Add VSX ISA2.06 xadd/xsub Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 09/22] target-ppc: Add VSX ISA2.06 xmul Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 10/22] target-ppc: Add VSX ISA2.06 xdiv Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 11/22] target-ppc: Add VSX ISA2.06 xre Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 12/22] target-ppc: Add VSX ISA2.06 xsqrt Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 13/22] target-ppc: Add VSX ISA2.06 xrsqrte Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 14/22] target-ppc: Add VSX ISA2.06 xtdiv Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 15/22] target-ppc: Add VSX ISA2.06 xtsqrt Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 16/22] target-ppc: Add VSX ISA2.06 Multiply Add Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 17/22] target-ppc: Add VSX xscmp*dp Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 18/22] target-ppc: Add VSX xmax/xmin Instructions Tom Musta
2013-12-24 16:23 ` Richard Henderson
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 19/22] target-ppc: Add VSX Vector Compare Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 20/22] target-ppc: Add VSX Floating Point to Floating Point Conversion Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 21/22] target-ppc: Add VSX ISA2.06 Integer " Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 22/22] target-ppc: Add VSX Rounding Instructions Tom Musta
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