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From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [V4 PATCH 02/22] softfloat: Add float32_to_uint64()
Date: Wed, 18 Dec 2013 14:19:01 -0600	[thread overview]
Message-ID: <1387397961-4894-3-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1387397961-4894-1-git-send-email-tommusta@gmail.com>

This patch adds the float32_to_uint64() routine, which converts a
32-bit floating point number to an unsigned 64 bit number.

This contribution can be licensed under either the softfloat-2a or -2b
license.

V2: Reduced patch to just this single routine per feedback from Peter
Maydell.

V4: Now passing sign to roundAndPackUint64()

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
 fpu/softfloat.c         |   45 +++++++++++++++++++++++++++++++++++++++++++++
 include/fpu/softfloat.h |    1 +
 2 files changed, 46 insertions(+), 0 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index ec23908..1ff59d0 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1558,6 +1558,51 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
 
 /*----------------------------------------------------------------------------
 | Returns the result of converting the single-precision floating-point value
+| `a' to the 64-bit unsigned integer format.  The conversion is
+| performed according to the IEC/IEEE Standard for Binary Floating-Point
+| Arithmetic---which means in particular that the conversion is rounded
+| according to the current rounding mode.  If `a' is a NaN, the largest
+| unsigned integer is returned.  Otherwise, if the conversion overflows, the
+| largest unsigned integer is returned.  If the 'a' is negative, zero is
+| returned.
+*----------------------------------------------------------------------------*/
+
+uint64 float32_to_uint64(float32 a STATUS_PARAM)
+{
+    flag aSign;
+    int_fast16_t aExp, shiftCount;
+    uint32_t aSig;
+    uint64_t aSig64, aSigExtra;
+    a = float32_squash_input_denormal(a STATUS_VAR);
+
+    aSig = extractFloat32Frac(a);
+    aExp = extractFloat32Exp(a);
+    aSign = extractFloat32Sign(a);
+    if (aSign) {
+        if (aExp) {
+            float_raise(float_flag_invalid STATUS_VAR);
+        } else if (aSig) { /* negative denormalized */
+            float_raise(float_flag_inexact STATUS_VAR);
+        }
+        return 0;
+    }
+    shiftCount = 0xBE - aExp;
+    if (aExp) {
+        aSig |= 0x00800000;
+    }
+    if (shiftCount < 0) {
+        float_raise(float_flag_invalid STATUS_VAR);
+        return (int64_t)LIT64(0xFFFFFFFFFFFFFFFF);
+    }
+
+    aSig64 = aSig;
+    aSig64 <<= 40;
+    shift64ExtraRightJamming(aSig64, 0, shiftCount, &aSig64, &aSigExtra);
+    return roundAndPackUint64(aSign, aSig64, aSigExtra STATUS_VAR);
+}
+
+/*----------------------------------------------------------------------------
+| Returns the result of converting the single-precision floating-point value
 | `a' to the 64-bit two's complement integer format.  The conversion is
 | performed according to the IEC/IEEE Standard for Binary Floating-Point
 | Arithmetic, except that the conversion is always rounded toward zero.  If
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 2365274..080b36d 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -272,6 +272,7 @@ int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM );
 uint32 float32_to_uint32( float32 STATUS_PARAM );
 uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM );
 int64 float32_to_int64( float32 STATUS_PARAM );
+uint64 float32_to_uint64(float32 STATUS_PARAM);
 int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM );
 float64 float32_to_float64( float32 STATUS_PARAM );
 floatx80 float32_to_floatx80( float32 STATUS_PARAM );
-- 
1.7.1

  parent reply	other threads:[~2013-12-18 20:20 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-18 20:18 [Qemu-devel] [V4 PATCH 00/22] PowerPC VSX Stage 3 Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 01/22] softfloat: Fix float64_to_uint64 Tom Musta
2013-12-19 22:11   ` Peter Maydell
2013-12-20 20:05     ` [Qemu-devel] [Qemu-ppc] " Tom Musta
2013-12-18 20:19 ` Tom Musta [this message]
2013-12-19 21:31   ` [Qemu-devel] [V4 PATCH 02/22] softfloat: Add float32_to_uint64() Peter Maydell
2013-12-20 20:07     ` Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 03/22] softfloat: Fix float64_to_uint64_round_to_zero Tom Musta
2013-12-19 21:43   ` Peter Maydell
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 04/22] softfloat: Fix float64_to_uint32 Tom Musta
2013-12-19 21:48   ` Peter Maydell
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 05/22] softfloat: Fix float64_to_uint32_round_to_zero Tom Musta
2013-12-19 21:41   ` Peter Maydell
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 06/22] target-ppc: Add set_fprf Argument to fload_invalid_op_excp() Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 07/22] target-ppc: General Support for VSX Helpers Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 08/22] target-ppc: Add VSX ISA2.06 xadd/xsub Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 09/22] target-ppc: Add VSX ISA2.06 xmul Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 10/22] target-ppc: Add VSX ISA2.06 xdiv Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 11/22] target-ppc: Add VSX ISA2.06 xre Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 12/22] target-ppc: Add VSX ISA2.06 xsqrt Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 13/22] target-ppc: Add VSX ISA2.06 xrsqrte Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 14/22] target-ppc: Add VSX ISA2.06 xtdiv Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 15/22] target-ppc: Add VSX ISA2.06 xtsqrt Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 16/22] target-ppc: Add VSX ISA2.06 Multiply Add Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 17/22] target-ppc: Add VSX xscmp*dp Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 18/22] target-ppc: Add VSX xmax/xmin Instructions Tom Musta
2013-12-24 16:23   ` Richard Henderson
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 19/22] target-ppc: Add VSX Vector Compare Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 20/22] target-ppc: Add VSX Floating Point to Floating Point Conversion Instructions Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 21/22] target-ppc: Add VSX ISA2.06 Integer " Tom Musta
2013-12-18 20:19 ` [Qemu-devel] [V4 PATCH 22/22] target-ppc: Add VSX Rounding Instructions Tom Musta

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