From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53161) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtO3h-0005Ig-Of for qemu-devel@nongnu.org; Wed, 18 Dec 2013 15:49:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VtO3W-0004Xu-5e for qemu-devel@nongnu.org; Wed, 18 Dec 2013 15:49:33 -0500 From: Tom Musta Date: Wed, 18 Dec 2013 14:48:55 -0600 Message-Id: <1387399747-4994-3-git-send-email-tommusta@gmail.com> In-Reply-To: <1387399747-4994-1-git-send-email-tommusta@gmail.com> References: <1387399747-4994-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [V3 PATCH 02/14] target-ppc: Add ISA2.06 bpermd Instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Tom Musta , qemu-ppc@nongnu.org This patch adds the Bit Permute Doubleword (bpermd) instruction, which was introduced in Power ISA 2.06 as part of the base 64-bit architecture. V2: Addressing stylistic comments from Richard Henderson. Signed-off-by: Tom Musta Reviewed-by: Richard Henderson --- target-ppc/helper.h | 1 + target-ppc/int_helper.c | 20 ++++++++++++++++++++ target-ppc/translate.c | 10 ++++++++++ 3 files changed, 31 insertions(+), 0 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 6250eba..1ec9c65 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -41,6 +41,7 @@ DEF_HELPER_3(sraw, tl, env, tl, tl) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_1(cntlzd, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_1(popcntd, TCG_CALL_NO_RWG_SE, tl, tl) +DEF_HELPER_3(bpermd, i64, env, i64, i64) DEF_HELPER_3(srad, tl, env, tl, tl) #endif diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index e50bdd2..abc69a7 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -53,6 +53,26 @@ target_ulong helper_cntlzd(target_ulong t) } #endif +#if defined(TARGET_PPC64) + +uint64_t helper_bpermd(CPUPPCState *env, uint64_t rs, uint64_t rb) +{ + int i; + uint64_t ra = 0; + + for (i = 0; i < 8; i++) { + int index = (rs >> (i*8)) & 0xFF; + if (index < 64) { + if (rb & (1ul << (63-index))) { + ra |= 1 << i; + } + } + } + return ra; +} + +#endif + target_ulong helper_cmpb(target_ulong rs, target_ulong rb) { target_ulong mask = 0xff; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1f7e499..0d39de2 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1525,6 +1525,15 @@ static void gen_prtyd(DisasContext *ctx) #endif #if defined(TARGET_PPC64) +/* bpermd */ +static void gen_bpermd(DisasContext *ctx) +{ + gen_helper_bpermd(cpu_gpr[rA(ctx->opcode)], cpu_env, + cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); +} +#endif + +#if defined(TARGET_PPC64) /* extsw & extsw. */ GEN_LOGICAL1(extsw, tcg_gen_ext32s_tl, 0x1E, PPC_64B); @@ -9322,6 +9331,7 @@ GEN_HANDLER_E(prtyw, 0x1F, 0x1A, 0x04, 0x0000F801, PPC_NONE, PPC2_ISA205), GEN_HANDLER(popcntd, 0x1F, 0x1A, 0x0F, 0x0000F801, PPC_POPCNTWD), GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B), GEN_HANDLER_E(prtyd, 0x1F, 0x1A, 0x05, 0x0000F801, PPC_NONE, PPC2_ISA205), +GEN_HANDLER_E(bpermd, 0x1F, 0x1C, 0x07, 0x00000001, PPC_NONE, PPC2_ISA206), #endif GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), -- 1.7.1