qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Alexander Graf <agraf@suse.de>
To: QEMU Developers <qemu-devel@nongnu.org>
Cc: Tom Musta <tommusta@gmail.com>,
	"qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>,
	Anthony Liguori <anthony@codemonkey.ws>
Subject: [Qemu-devel] [PULL 24/32] Add xxmrgh/xxmrgl
Date: Fri, 20 Dec 2013 02:00:46 +0100	[thread overview]
Message-ID: <1387501254-60704-25-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1387501254-60704-1-git-send-email-agraf@suse.de>

From: Tom Musta <tommusta@gmail.com>

This patch adds the VSX Merge High Word and VSX Merge Low Word
instructions.

V2: Now implemented using deposit (per Richard Henderson's comment)

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/translate.c | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 710ae32..75226fa 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7287,6 +7287,45 @@ VSX_LOGICAL(xxlor, tcg_gen_or_tl)
 VSX_LOGICAL(xxlxor, tcg_gen_xor_tl)
 VSX_LOGICAL(xxlnor, tcg_gen_nor_tl)
 
+#define VSX_XXMRG(name, high)                               \
+static void glue(gen_, name)(DisasContext * ctx)            \
+    {                                                       \
+        TCGv_i64 a0, a1, b0, b1;                            \
+        if (unlikely(!ctx->vsx_enabled)) {                  \
+            gen_exception(ctx, POWERPC_EXCP_VSXU);          \
+            return;                                         \
+        }                                                   \
+        a0 = tcg_temp_new();                                \
+        a1 = tcg_temp_new();                                \
+        b0 = tcg_temp_new();                                \
+        b1 = tcg_temp_new();                                \
+        if (high) {                                         \
+            tcg_gen_mov_i64(a0, cpu_vsrh(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(a1, cpu_vsrh(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(b0, cpu_vsrh(xB(ctx->opcode))); \
+            tcg_gen_mov_i64(b1, cpu_vsrh(xB(ctx->opcode))); \
+        } else {                                            \
+            tcg_gen_mov_i64(a0, cpu_vsrl(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(a1, cpu_vsrl(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(b0, cpu_vsrl(xB(ctx->opcode))); \
+            tcg_gen_mov_i64(b1, cpu_vsrl(xB(ctx->opcode))); \
+        }                                                   \
+        tcg_gen_shri_i64(a0, a0, 32);                       \
+        tcg_gen_shri_i64(b0, b0, 32);                       \
+        tcg_gen_deposit_i64(cpu_vsrh(xT(ctx->opcode)),      \
+                            b0, a0, 32, 32);                \
+        tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)),      \
+                            b1, a1, 32, 32);                \
+        tcg_temp_free(a0);                                  \
+        tcg_temp_free(a1);                                  \
+        tcg_temp_free(b0);                                  \
+        tcg_temp_free(b1);                                  \
+    }
+
+VSX_XXMRG(xxmrghw, 1)
+VSX_XXMRG(xxmrglw, 0)
+
+
 /***                           SPE extension                               ***/
 /* Register moves */
 
@@ -9798,6 +9837,8 @@ VSX_LOGICAL(xxlandc, 0x8, 0x11, PPC2_VSX),
 VSX_LOGICAL(xxlor, 0x8, 0x12, PPC2_VSX),
 VSX_LOGICAL(xxlxor, 0x8, 0x13, PPC2_VSX),
 VSX_LOGICAL(xxlnor, 0x8, 0x14, PPC2_VSX),
+GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX),
+GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX),
 
 GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01),
 
-- 
1.8.1.4

  parent reply	other threads:[~2013-12-20  1:01 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-20  1:00 [Qemu-devel] [PULL 00/32] ppc patch queue 2013-12-20 Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 01/32] target-ppc: add stubs for KVM breakpoints Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 02/32] powerpc: add PVR mask support Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 03/32] Declare and Enable VSX Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 04/32] Add MSR VSX and Associated Exception Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 05/32] Add VSX Instruction Decoders Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 06/32] Add VSR to Global Registers Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 07/32] Add lxvd2x Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 08/32] Add stxvd2x Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 09/32] Add xxpermdi Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 10/32] Add lxsdx Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 11/32] Add lxvdsx Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 12/32] Add lxvw4x Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 13/32] Add stxsdx Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 14/32] Add stxvw4x Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 15/32] target-ppc: move POWER7+ to a separate family Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 16/32] spapr-rtas: replace return code constants with macros Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 17/32] spapr-rtas: add ibm, (get|set)-system-parameter Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 18/32] PPC: Use default pci bus name for grackle and heathrow Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 19/32] spapr: tie spapr-nvram to -pflash Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 20/32] roms: Flush icache when writing roms to guest memory Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 21/32] Add VSX Scalar Move Instructions Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 22/32] Add VSX Vector " Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 23/32] Add Power7 VSX Logical Instructions Alexander Graf
2013-12-20  1:00 ` Alexander Graf [this message]
2013-12-20  1:00 ` [Qemu-devel] [PULL 25/32] Add xxsel Alexander Graf
2013-12-20  6:54   ` Stefan Weil
2013-12-20  9:26     ` Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 26/32] Add xxspltw Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 27/32] Add xxsldwi Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 28/32] PPC: Add VSX to hflags Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 29/32] device_tree: s/qemu_devtree/qemu_fdt globally Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 30/32] device_tree: qemu_fdt_setprop: Rename val_array arg Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 31/32] spapr: make sure RMA is in first mode of first memory node Alexander Graf
2013-12-20  1:00 ` [Qemu-devel] [PULL 32/32] spapr: limit numa memory regions by ram size Alexander Graf
2013-12-23 18:08 ` [Qemu-devel] [PULL 00/32] ppc patch queue 2013-12-20 Andreas Färber
2013-12-23 18:10   ` Alexander Graf
2013-12-24 15:19     ` Tom Musta

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1387501254-60704-25-git-send-email-agraf@suse.de \
    --to=agraf@suse.de \
    --cc=anthony@codemonkey.ws \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=tommusta@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).