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From: Alexey Kardashevskiy <aik@ozlabs.ru>
To: qemu-devel@nongnu.org
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
	qemu-ppc@nongnu.org, Alexander Graf <agraf@suse.de>
Subject: [Qemu-devel] [PATCH 1/5] target-ppc: fix LPCR SPR number
Date: Fri, 20 Dec 2013 17:41:30 +1100	[thread overview]
Message-ID: <1387521694-28623-2-git-send-email-aik@ozlabs.ru> (raw)
In-Reply-To: <1387521694-28623-1-git-send-email-aik@ozlabs.ru>

PowerISA defines LPCR SPR number as 318=0x13E but QEMU uses the value of
316.

This fixes the definition of LPCR SPR.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
 target-ppc/cpu.h            | 2 +-
 target-ppc/translate_init.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index bb84767..4369e7c 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1322,12 +1322,12 @@ static inline int cpu_mmu_index (CPUPPCState *env)
 #define SPR_BOOKE_IAC3        (0x13A)
 #define SPR_HSRR1             (0x13B)
 #define SPR_BOOKE_IAC4        (0x13B)
-#define SPR_LPCR              (0x13C)
 #define SPR_BOOKE_DAC1        (0x13C)
 #define SPR_LPIDR             (0x13D)
 #define SPR_DABR2             (0x13D)
 #define SPR_BOOKE_DAC2        (0x13D)
 #define SPR_BOOKE_DVC1        (0x13E)
+#define SPR_LPCR              (0x13E)
 #define SPR_BOOKE_DVC2        (0x13F)
 #define SPR_BOOKE_TSR         (0x150)
 #define SPR_BOOKE_TCR         (0x154)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 5f59746..97d50af 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -2578,8 +2578,8 @@ static void gen_spr_8xx (CPUPPCState *env)
  * HRMOR   => SPR 313 (Power 2.04 hypv)
  * HSRR0   => SPR 314 (Power 2.04 hypv)
  * HSRR1   => SPR 315 (Power 2.04 hypv)
- * LPCR    => SPR 316 (970)
  * LPIDR   => SPR 317 (970)
+ * LPCR    => SPR 318 (970)
  * EPR     => SPR 702 (Power 2.04 emb)
  * perf    => 768-783 (Power 2.04)
  * perf    => 784-799 (Power 2.04)
-- 
1.8.4.rc4

  reply	other threads:[~2013-12-20  6:42 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-20  6:41 [Qemu-devel] [PATCH 0/5] targe-ppc: 970/p5+/p7/p7+/p8 SPRs cleanup Alexey Kardashevskiy
2013-12-20  6:41 ` Alexey Kardashevskiy [this message]
2013-12-20  6:41 ` [Qemu-devel] [PATCH 2/5] target-ppc: remove powerpc 970gx Alexey Kardashevskiy
2013-12-20  6:41 ` [Qemu-devel] [PATCH 3/5] target-ppc: fix SPR_CTRL/SPR_UCTRL register numbers Alexey Kardashevskiy
2013-12-20  6:41 ` [Qemu-devel] [PATCH 4/5] target-ppc: remove embedded MMU SPRs from 970, P5+/7/7+/8 Alexey Kardashevskiy
2013-12-20  6:41 ` [Qemu-devel] [PATCH 5/5] target-ppc: remove unsupported SPRs from 970 and P5+ Alexey Kardashevskiy
2013-12-20 10:51 ` [Qemu-devel] [PATCH 0/5] targe-ppc: 970/p5+/p7/p7+/p8 SPRs cleanup Alexander Graf

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