From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 7/8] target-sh4: factorize fmov implementation
Date: Sat, 21 Dec 2013 17:59:04 +0100 [thread overview]
Message-ID: <1387645145-13069-8-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1387645145-13069-1-git-send-email-aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
target-sh4/translate.c | 31 ++++++++++++++-----------------
1 file changed, 14 insertions(+), 17 deletions(-)
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 26b45c1..23d51c6 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1024,23 +1024,20 @@ static void _decode_opc(DisasContext * ctx)
return;
case 0xf00b: /* fmov {F,D,X}Rm,@-Rn - FPSCR: Nothing */
CHECK_FPU_ENABLED
- if (ctx->flags & FPSCR_SZ) {
- TCGv addr = tcg_temp_new_i32();
- int fr = XREG(B7_4);
- tcg_gen_subi_i32(addr, REG(B11_8), 4);
- tcg_gen_qemu_st32(cpu_fregs[fr+1], addr, ctx->memidx);
- tcg_gen_subi_i32(addr, addr, 4);
- tcg_gen_qemu_st32(cpu_fregs[fr ], addr, ctx->memidx);
- tcg_gen_mov_i32(REG(B11_8), addr);
- tcg_temp_free(addr);
- } else {
- TCGv addr;
- addr = tcg_temp_new_i32();
- tcg_gen_subi_i32(addr, REG(B11_8), 4);
- tcg_gen_qemu_st32(cpu_fregs[FREG(B7_4)], addr, ctx->memidx);
- tcg_gen_mov_i32(REG(B11_8), addr);
- tcg_temp_free(addr);
- }
+ {
+ const int fr = XREG(B7_4);
+ TCGv addr = tcg_temp_new_i32();
+ tcg_gen_subi_i32(addr, REG(B11_8), 4);
+ if (ctx->flags & FPSCR_SZ) {
+ tcg_gen_qemu_st32(cpu_fregs[fr+1], addr, ctx->memidx);
+ tcg_gen_subi_i32(addr, addr, 4);
+ tcg_gen_qemu_st32(cpu_fregs[fr], addr, ctx->memidx);
+ } else {
+ tcg_gen_qemu_st32(cpu_fregs[fr], addr, ctx->memidx);
+ }
+ tcg_gen_mov_i32(REG(B11_8), addr);
+ tcg_temp_free(addr);
+ }
return;
case 0xf006: /* fmov @(R0,Rm),{F,D,X}Rm - FPSCR: Nothing */
CHECK_FPU_ENABLED
--
1.7.10.4
next prev parent reply other threads:[~2013-12-21 16:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-21 16:58 [Qemu-devel] [PATCH 0/8] target-sh4: optimizations and cleanups Aurelien Jarno
2013-12-21 16:58 ` [Qemu-devel] [PATCH 1/8] target-sh4: use bit number for SR constants Aurelien Jarno
2013-12-21 16:58 ` [Qemu-devel] [PATCH 2/8] target-sh4: Split out T from SR Aurelien Jarno
2013-12-21 16:59 ` [Qemu-devel] [PATCH 3/8] target-sh4: optimize addc using add2 Aurelien Jarno
2013-12-21 16:59 ` [Qemu-devel] [PATCH 4/8] target-sh4: optimize subc using sub2 Aurelien Jarno
2013-12-21 16:59 ` [Qemu-devel] [PATCH 5/8] target-sh4: optimize negc using add2 and sub2 Aurelien Jarno
2013-12-21 16:59 ` [Qemu-devel] [PATCH 6/8] target-sh4: split out Q and M from of SR and optimize div1 Aurelien Jarno
2013-12-21 16:59 ` Aurelien Jarno [this message]
2013-12-21 18:52 ` [Qemu-devel] [PATCH 7/8] target-sh4: factorize fmov implementation Peter Maydell
2013-12-22 11:25 ` Aurelien Jarno
2013-12-21 16:59 ` [Qemu-devel] [PATCH 8/8] target-sh4: remove dead code Aurelien Jarno
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