From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36250) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vul58-0006LF-A8 for qemu-devel@nongnu.org; Sun, 22 Dec 2013 10:36:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vul52-0003Fp-Ou for qemu-devel@nongnu.org; Sun, 22 Dec 2013 10:36:42 -0500 Received: from smtp5-g21.free.fr ([2a01:e0c:1:1599::14]:39495) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vul52-0003Fe-5P for qemu-devel@nongnu.org; Sun, 22 Dec 2013 10:36:36 -0500 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sun, 22 Dec 2013 16:37:28 +0100 Message-Id: <1387726650-8306-6-git-send-email-hpoussin@reactos.org> In-Reply-To: <1387726650-8306-1-git-send-email-hpoussin@reactos.org> References: <1387726650-8306-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 5/7] rc4030: document register at offset 0x210 (memory refresh rate) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aurelien Jarno Register name is known, but its format is not known. Signed-off-by: Herv=C3=A9 Poussineau --- hw/dma/rc4030.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 432a4e4..09d235e 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -86,7 +86,7 @@ typedef struct rc4030State uint32_t cache_bmask; /* 0x0058: I/O Cache Byte Mask */ =20 uint32_t nmi_interrupt; /* 0x0200: interrupt source */ - uint32_t offset210; + uint32_t memory_refresh_rate; /* 0x0210: memory refresh rate */ uint32_t nvram_protect; /* 0x0220: NV ram protect register */ uint32_t rem_speed[16]; uint32_t imr_jazz; /* Local bus int enable mask */ @@ -228,9 +228,9 @@ static uint64_t rc4030_read(void *opaque, hwaddr addr= , unsigned int size) case 0x0208: val =3D 0; break; - /* Offset 0x0210 */ + /* Memory refresh rate */ case 0x0210: - val =3D s->offset210; + val =3D s->memory_refresh_rate; break; /* NV ram protect register */ case 0x0220: @@ -451,9 +451,9 @@ static void rc4030_write(void *opaque, hwaddr addr, u= int64_t data, s->dma_regs[entry][idx] =3D val; } break; - /* Offset 0x0210 */ + /* Memory refresh rate */ case 0x0210: - s->offset210 =3D val; + s->memory_refresh_rate =3D val; break; /* Interval timer reload */ case 0x0228: @@ -611,7 +611,7 @@ static void rc4030_reset(void *opaque) s->cache_ptag =3D s->cache_ltag =3D 0; s->cache_bmask =3D 0; =20 - s->offset210 =3D 0x18186; + s->memory_refresh_rate =3D 0x18186; s->nvram_protect =3D 7; for (i =3D 0; i < 15; i++) s->rem_speed[i] =3D 7; @@ -645,7 +645,7 @@ static int rc4030_load(QEMUFile *f, void *opaque, int= version_id) s->cache_ptag =3D qemu_get_be32(f); s->cache_ltag =3D qemu_get_be32(f); s->cache_bmask =3D qemu_get_be32(f); - s->offset210 =3D qemu_get_be32(f); + s->memory_refresh_rate =3D qemu_get_be32(f); s->nvram_protect =3D qemu_get_be32(f); for (i =3D 0; i < 15; i++) s->rem_speed[i] =3D qemu_get_be32(f); @@ -677,7 +677,7 @@ static void rc4030_save(QEMUFile *f, void *opaque) qemu_put_be32(f, s->cache_ptag); qemu_put_be32(f, s->cache_ltag); qemu_put_be32(f, s->cache_bmask); - qemu_put_be32(f, s->offset210); + qemu_put_be32(f, s->memory_refresh_rate); qemu_put_be32(f, s->nvram_protect); for (i =3D 0; i < 15; i++) qemu_put_be32(f, s->rem_speed[i]); --=20 1.7.10.4