From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36309) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vul5K-0006f1-PG for qemu-devel@nongnu.org; Sun, 22 Dec 2013 10:37:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vul5E-0003HC-QM for qemu-devel@nongnu.org; Sun, 22 Dec 2013 10:36:54 -0500 Received: from smtp5-g21.free.fr ([2a01:e0c:1:1599::14]:39809) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vul5B-0003Gd-3h for qemu-devel@nongnu.org; Sun, 22 Dec 2013 10:36:48 -0500 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sun, 22 Dec 2013 16:37:30 +0100 Message-Id: <1387726650-8306-8-git-send-email-hpoussin@reactos.org> In-Reply-To: <1387726650-8306-1-git-send-email-hpoussin@reactos.org> References: <1387726650-8306-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 7/7] rc4030: convert to QOM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aurelien Jarno Signed-off-by: Herv=C3=A9 Poussineau --- hw/dma/rc4030.c | 118 +++++++++++++++++++++++++++++++++++++-----= ------ hw/mips/mips_jazz.c | 37 +++++++++------ include/hw/mips/mips.h | 4 +- 3 files changed, 115 insertions(+), 44 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 198bbdd..5aa861d 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -1,7 +1,7 @@ /* * QEMU JAZZ RC4030 chipset * - * Copyright (c) 2007-2009 Herve Poussineau + * Copyright (c) 2007-2013 Herv=C3=A9 Poussineau * * Permission is hereby granted, free of charge, to any person obtaining= a copy * of this software and associated documentation files (the "Software"),= to deal @@ -24,6 +24,7 @@ =20 #include "hw/hw.h" #include "hw/mips/mips.h" +#include "hw/sysbus.h" #include "qemu/timer.h" #include "exec/address-spaces.h" #include "trace.h" @@ -49,8 +50,14 @@ typedef struct dma_pagetable_entry { #define DMA_FLAG_MEM_INTR 0x0200 #define DMA_FLAG_ADDR_INTR 0x0400 =20 +#define TYPE_RC4030 "rc4030" +#define RC4030(obj) \ + OBJECT_CHECK(rc4030State, (obj), TYPE_RC4030) + typedef struct rc4030State { + SysBusDevice parent_obj; + uint32_t config; /* 0x0000: RC4030 config register */ uint32_t revision; /* 0x0008: RC4030 Revision register */ uint32_t invalid_address_register; /* 0x0010: Invalid Address regist= er */ @@ -307,7 +314,7 @@ static void rc4030_dma_table_update(rc4030State *s, u= int32_t new_tl_base, new_tl_base &=3D 0x7fffffff; =20 if (s->dma_tl_limit) { - memory_region_init_rom_device(&s->dma_table, NULL, + memory_region_init_rom_device(&s->dma_table, OBJECT(s), &rc4030_dma_table_ops, s, "dma-translation-table", s->dma_tl= _limit); dma_tl_contents =3D memory_region_get_ram_ptr(&s->dma_table); @@ -322,7 +329,7 @@ static void rc4030_dma_table_update(rc4030State *s, u= int32_t new_tl_base, &s->dma_table); memory_region_transaction_commit(); } else { - memory_region_init(&s->dma_table, NULL, + memory_region_init(&s->dma_table, OBJECT(s), "dma-translation-table", 0); } } @@ -567,9 +574,9 @@ static const MemoryRegionOps jazzio_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 -static void rc4030_reset(void *opaque) +static void rc4030_reset(DeviceState *dev) { - rc4030State *s =3D opaque; + rc4030State *s =3D RC4030(dev); int i; =20 s->config =3D 0x410; /* some boards seem to accept 0x104 too */ @@ -722,42 +729,99 @@ static rc4030_dma *rc4030_allocate_dmas(void *opaqu= e, int n) return s; } =20 -AddressSpace *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, - qemu_irq **irqs, rc4030_dma **dmas, - MemoryRegion *sysmem) +static void rc4030_initfn(Object *obj) { - rc4030State *s; - int i; - - s =3D g_malloc0(sizeof(rc4030State)); + DeviceState *dev =3D DEVICE(obj); + rc4030State *s =3D RC4030(obj); + SysBusDevice *sysbus =3D SYS_BUS_DEVICE(obj); =20 - *irqs =3D qemu_allocate_irqs(rc4030_irq_jazz_request, s, 16); - *dmas =3D rc4030_allocate_dmas(s, 4); + qdev_init_gpio_in(dev, rc4030_irq_jazz_request, 16); =20 - s->periodic_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, rc4030_period= ic_timer, s); - s->timer_irq =3D timer; - s->jazz_bus_irq =3D jazz_bus; + sysbus_init_irq(sysbus, &s->timer_irq); + sysbus_init_irq(sysbus, &s->jazz_bus_irq); =20 - qemu_register_reset(rc4030_reset, s); register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s); =20 - memory_region_init_io(&s->iomem_chipset, NULL, &rc4030_ops, s, + sysbus_init_mmio(sysbus, &s->iomem_chipset); + sysbus_init_mmio(sysbus, &s->iomem_jazzio); +} + +static void rc4030_realize(DeviceState *dev, Error **errp) +{ + rc4030State *s =3D RC4030(dev); + Object *o =3D OBJECT(dev); + int i; + + s->periodic_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, rc4030_period= ic_timer, + s); + + memory_region_init_io(&s->iomem_chipset, o, &rc4030_ops, s, "rc4030", 0x300); - memory_region_add_subregion(sysmem, 0x80000000, &s->iomem_chipset); - memory_region_init_io(&s->iomem_jazzio, NULL, &jazzio_ops, s, + memory_region_init_io(&s->iomem_jazzio, o, &jazzio_ops, s, "jazzio", 0x00001000); - memory_region_add_subregion(sysmem, 0xf0000000, &s->iomem_jazzio); =20 - memory_region_init(&s->dma_table, NULL, "dma-translation-table", 0); - memory_region_init(&s->dma_region, NULL, "dma-region", INT32_MAX); + memory_region_init(&s->dma_table, o, "dma-translation-table", 0); + memory_region_init(&s->dma_region, o, "dma-region", INT32_MAX); for (i =3D 0; i < MAX_TL_ENTRIES; ++i) { - memory_region_init_alias(&s->dma_aliases[i], NULL, "dma-alias", + memory_region_init_alias(&s->dma_aliases[i], o, "dma-alias", get_system_memory(), 0, DMA_PAGESIZE); memory_region_set_enabled(&s->dma_aliases[i], false); memory_region_add_subregion(&s->dma_region, i * DMA_PAGESIZE, &s->dma_aliases[i]); } address_space_init(&s->dma_as, &s->dma_region, "rc4030_dma"); - rc4030_reset(s); - return &s->dma_as; +} + +static void rc4030_unrealize(DeviceState *dev, Error **errp) +{ + rc4030State *s =3D RC4030(dev); + int i; + + timer_free(s->periodic_timer); + memory_region_destroy(&s->iomem_chipset); + memory_region_destroy(&s->iomem_jazzio); + + address_space_destroy(&s->dma_as); + for (i =3D 0; i < MAX_TL_ENTRIES; ++i) { + memory_region_del_subregion(&s->dma_region, &s->dma_aliases[i]); + memory_region_destroy(&s->dma_aliases[i]); + } + memory_region_destroy(&s->dma_region); + memory_region_destroy(&s->dma_table); +} + +static void rc4030_class_init(ObjectClass *klass, void *class_data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D rc4030_realize; + dc->unrealize =3D rc4030_unrealize; + dc->reset =3D rc4030_reset; +} + +static const TypeInfo rc4030_info =3D { + .name =3D TYPE_RC4030, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(rc4030State), + .instance_init =3D rc4030_initfn, + .class_init =3D rc4030_class_init, +}; + +static void rc4030_register_types(void) +{ + type_register_static(&rc4030_info); +} + +type_init(rc4030_register_types) + +DeviceState *rc4030_init(rc4030_dma **dmas, AddressSpace **dma_as) +{ + DeviceState *dev; + + dev =3D qdev_create(NULL, TYPE_RC4030); + qdev_init_nofail(dev); + + *dmas =3D rc4030_allocate_dmas(dev, 4); + *dma_as =3D &RC4030(dev)->dma_as; + return dev; } diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 41806af..f512a98 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -131,7 +131,7 @@ static void mips_jazz_init(MemoryRegion *address_spac= e, MIPSCPU *cpu; CPUClass *cc; CPUMIPSState *env; - qemu_irq *rc4030, *i8259; + qemu_irq *i8259; rc4030_dma *dmas; AddressSpace *rc4030_as; MemoryRegion *isa =3D g_new(MemoryRegion, 1); @@ -139,7 +139,7 @@ static void mips_jazz_init(MemoryRegion *address_spac= e, MemoryRegion *i8042 =3D g_new(MemoryRegion, 1); MemoryRegion *dma_dummy =3D g_new(MemoryRegion, 1); NICInfo *nd; - DeviceState *dev; + DeviceState *dev, *rc4030; SysBusDevice *sysbus; ISABus *isa_bus; ISADevice *pit; @@ -207,8 +207,14 @@ static void mips_jazz_init(MemoryRegion *address_spa= ce, cpu_mips_clock_init(env); =20 /* Chipset */ - rc4030_as =3D rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas, - address_space); + rc4030 =3D rc4030_init(&dmas, &rc4030_as); + sysbus =3D SYS_BUS_DEVICE(rc4030); + sysbus_connect_irq(sysbus, 0, env->irq[6]); + sysbus_connect_irq(sysbus, 1, env->irq[3]); + memory_region_add_subregion(address_space, 0x80000000, + sysbus_mmio_get_region(sysbus, 0)); + memory_region_add_subregion(address_space, 0xf0000000, + sysbus_mmio_get_region(sysbus, 1)); memory_region_init_io(dma_dummy, NULL, &dma_dummy_ops, NULL, "dummy_= dma", 0x1000); memory_region_add_subregion(address_space, 0x8000d000, dma_dummy); =20 @@ -235,7 +241,7 @@ static void mips_jazz_init(MemoryRegion *address_spac= e, sysbus =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x60080000); sysbus_mmio_map(sysbus, 1, 0x40000000); - sysbus_connect_irq(sysbus, 0, rc4030[3]); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 3)); { /* Simple ROM, so user doesn't have to provide one */ MemoryRegion *rom_mr =3D g_new(MemoryRegion, 1); @@ -260,8 +266,8 @@ static void mips_jazz_init(MemoryRegion *address_spac= e, if (!nd->model) nd->model =3D g_strdup("dp83932"); if (strcmp(nd->model, "dp83932") =3D=3D 0) { - dp83932_init(nd, 0x80001000, 2, get_system_memory(), rc4030[= 4], - rc4030_as); + dp83932_init(nd, 0x80001000, 2, get_system_memory(), + qdev_get_gpio_in(rc4030, 4), rc4030_as); break; } else if (is_help_option(nd->model)) { fprintf(stderr, "qemu: Supported NICs: dp83932\n"); @@ -275,7 +281,7 @@ static void mips_jazz_init(MemoryRegion *address_spac= e, /* SCSI adapter */ esp_init(0x80002000, 0, rc4030_dma_read, rc4030_dma_write, dmas[0], - rc4030[5], &esp_reset, &dma_enable); + qdev_get_gpio_in(rc4030, 5), &esp_reset, &dma_enable); =20 /* Floppy */ if (drive_get_max_bus(IF_FLOPPY) >=3D MAX_FD) { @@ -285,7 +291,7 @@ static void mips_jazz_init(MemoryRegion *address_spac= e, for (n =3D 0; n < MAX_FD; n++) { fds[n] =3D drive_get(IF_FLOPPY, 0, n); } - fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds); + fdctrl_init_sysbus(qdev_get_gpio_in(rc4030, 1), 0, 0x80003000, fds); =20 /* Real time clock */ rtc_init(isa_bus, 1980, NULL); @@ -293,23 +299,26 @@ static void mips_jazz_init(MemoryRegion *address_sp= ace, memory_region_add_subregion(address_space, 0x80004000, rtc); =20 /* Keyboard (i8042) */ - i8042_mm_init(rc4030[6], rc4030[7], i8042, 0x1000, 0x1); + i8042_mm_init(qdev_get_gpio_in(rc4030, 6), qdev_get_gpio_in(rc4030, = 7), + i8042, 0x1000, 0x1); memory_region_add_subregion(address_space, 0x80005000, i8042); =20 /* Serial ports */ if (serial_hds[0]) { - serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 8000000/= 16, + serial_mm_init(address_space, 0x80006000, 0, + qdev_get_gpio_in(rc4030, 8), 8000000/16, serial_hds[0], DEVICE_NATIVE_ENDIAN); } if (serial_hds[1]) { - serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 8000000/= 16, + serial_mm_init(address_space, 0x80007000, 0, + qdev_get_gpio_in(rc4030, 9), 8000000/16, serial_hds[1], DEVICE_NATIVE_ENDIAN); } =20 /* Parallel port */ if (parallel_hds[0]) - parallel_mm_init(address_space, 0x80008000, 0, rc4030[0], - parallel_hds[0]); + parallel_mm_init(address_space, 0x80008000, 0, + qdev_get_gpio_in(rc4030, 0), parallel_hds[0]); =20 /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */ =20 diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h index f6c9d7e..309cae6 100644 --- a/include/hw/mips/mips.h +++ b/include/hw/mips/mips.h @@ -18,9 +18,7 @@ typedef struct rc4030DMAState *rc4030_dma; void rc4030_dma_read(void *dma, uint8_t *buf, int len); void rc4030_dma_write(void *dma, uint8_t *buf, int len); =20 -AddressSpace *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, - qemu_irq **irqs, rc4030_dma **dmas, - MemoryRegion *sysmem); +DeviceState *rc4030_init(rc4030_dma **dmas, AddressSpace **dma_as); =20 /* dp8393x.c */ void dp83932_init(NICInfo *nd, hwaddr base, int it_shift, --=20 1.7.10.4