From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
patches@linaro.org, "Michael Matz" <matz@suse.de>,
"Alexander Graf" <agraf@suse.de>,
"Claudio Fontana" <claudio.fontana@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
kvmarm@lists.cs.columbia.edu,
"Christoffer Dall" <christoffer.dall@linaro.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v2 24/25] .travis.yml: Add aarch64-* targets
Date: Sun, 22 Dec 2013 22:50:06 +0000 [thread overview]
Message-ID: <1387752607-23755-25-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1387752607-23755-1-git-send-email-peter.maydell@linaro.org>
From: Alex Bennée <alex.bennee@linaro.org>
Now the AArch64 targets are in mainline we can include them in our
Travis test matrix.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
index 90f1676..c7ff4da 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -16,6 +16,7 @@ env:
matrix:
- TARGETS=alpha-softmmu,alpha-linux-user
- TARGETS=arm-softmmu,arm-linux-user
+ - TARGETS=aarch64-softmmu,aarch64-linux-user
- TARGETS=cris-softmmu
- TARGETS=i386-softmmu,x86_64-softmmu
- TARGETS=lm32-softmmu
--
1.8.5
next prev parent reply other threads:[~2013-12-22 22:56 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-22 22:49 [Qemu-devel] [PATCH v2 00/25] target-arm: A64 decoder sets 3 and 4: everything but fp & simd Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 01/25] target-arm: A64: add support for ld/st pair Peter Maydell
2013-12-23 19:49 ` Richard Henderson
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 02/25] target-arm: A64: add support for ld/st unsigned imm Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 03/25] target-arm: A64: add support for ld/st with reg offset Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 04/25] target-arm: A64: add support for ld/st with index Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 05/25] target-arm: A64: add support for add, addi, sub, subi Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 06/25] target-arm: A64: add support for move wide instructions Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 07/25] target-arm: A64: add support for 3 src data proc insns Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 08/25] target-arm: A64: implement SVC, BRK Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 09/25] target-arm: A64: Add decoder skeleton for FP instructions Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 10/25] target-arm: A64: implement FMOV Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 11/25] target-arm: Pull "add one cpreg to hashtable" into its own function Peter Maydell
2013-12-23 19:51 ` Richard Henderson
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 12/25] target-arm: Update generic cpreg code for AArch64 Peter Maydell
2014-01-02 1:51 ` Peter Crosthwaite
2014-01-02 10:23 ` Peter Maydell
2014-01-04 19:58 ` Peter Maydell
2014-01-05 2:44 ` Peter Crosthwaite
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 13/25] target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder Peter Maydell
2013-12-23 20:11 ` Richard Henderson
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 14/25] target-arm: A64: Implement MRS/MSR/SYS/SYSL Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 15/25] target-arm: A64: Implement minimal set of EL0-visible sysregs Peter Maydell
2014-01-04 2:34 ` Peter Crosthwaite
2014-01-04 11:35 ` Peter Maydell
2014-01-04 13:39 ` Peter Crosthwaite
2014-01-04 13:32 ` Peter Crosthwaite
2014-01-04 14:11 ` Peter Maydell
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 16/25] target-arm: Widen thread-local register state fields to 64 bits Peter Maydell
2013-12-23 20:23 ` Richard Henderson
2013-12-22 22:49 ` [Qemu-devel] [PATCH v2 17/25] target-arm: A64: add support for add/sub with carry Peter Maydell
2013-12-22 22:50 ` [Qemu-devel] [PATCH v2 18/25] target-arm: A64: add support for conditional compare insns Peter Maydell
2013-12-23 20:37 ` Richard Henderson
2013-12-22 22:50 ` [Qemu-devel] [PATCH v2 19/25] target-arm: aarch64: add support for ld lit Peter Maydell
2013-12-22 22:50 ` [Qemu-devel] [PATCH v2 20/25] target-arm: Widen exclusive-access support struct fields to 64 bits Peter Maydell
2013-12-23 21:27 ` Richard Henderson
2013-12-22 22:50 ` [Qemu-devel] [PATCH v2 21/25] target-arm: A64: support for ld/st/cl exclusive Peter Maydell
2013-12-23 21:34 ` Richard Henderson
2013-12-22 22:50 ` [Qemu-devel] [PATCH v2 22/25] linux-user: AArch64: define TARGET_CLONE_BACKWARDS Peter Maydell
2013-12-23 21:41 ` Richard Henderson
2013-12-22 22:50 ` [Qemu-devel] [PATCH v2 23/25] linux-user: AArch64: Use correct values for FPSR/FPCR in sigcontext Peter Maydell
2013-12-23 21:43 ` Richard Henderson
2013-12-22 22:50 ` Peter Maydell [this message]
2013-12-22 22:50 ` [Qemu-devel] [PATCH v2 25/25] default-configs: Add config for aarch64-linux-user Peter Maydell
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