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From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Laszlo Ersek <lersek@redhat.com>,
	Gerd Hoffmann <kraxel@redhat.com>,
	Anthony Liguori <aliguori@amazon.com>
Subject: [Qemu-devel] [PULL 17/19] piix: fix 32bit pci hole
Date: Mon, 23 Dec 2013 18:12:18 +0200	[thread overview]
Message-ID: <1387815007-1272-18-git-send-email-mst@redhat.com> (raw)
In-Reply-To: <1387815007-1272-1-git-send-email-mst@redhat.com>

From: Gerd Hoffmann <kraxel@redhat.com>

Make the 32bit pci hole start at end of ram, so all possible address
space is covered.

We used to try and make addresses aligned so they are easier to cover
with MTRRs, but since they are cosmetic on KVM, this is probably not
worth worrying about.
Of course the firmware can use less than that.  Leaving space unused is
no problem, mapping pci bars outside the hole causes problems though.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 include/hw/i386/pc.h |  1 +
 hw/i386/pc_piix.c    |  1 +
 hw/pci-host/piix.c   | 11 ++---------
 3 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 24eb3de..eb3da96 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -182,6 +182,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
                     MemoryRegion *address_space_mem,
                     MemoryRegion *address_space_io,
                     ram_addr_t ram_size,
+                    ram_addr_t below_4g_mem_size,
                     ram_addr_t above_4g_mem_size,
                     MemoryRegion *pci_memory,
                     MemoryRegion *ram_memory);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 832e20c..2766414 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -170,6 +170,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
     if (pci_enabled) {
         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
                               system_memory, system_io, args->ram_size,
+                              below_4g_mem_size,
                               above_4g_mem_size,
                               pci_memory, ram_memory);
     } else {
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 63be7f6..4229d09 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -311,6 +311,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
                     MemoryRegion *address_space_mem,
                     MemoryRegion *address_space_io,
                     ram_addr_t ram_size,
+                    ram_addr_t below_4g_mem_size,
                     ram_addr_t above_4g_mem_size,
                     MemoryRegion *pci_address_space,
                     MemoryRegion *ram_memory)
@@ -340,15 +341,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
     f->ram_memory = ram_memory;
 
     i440fx = I440FX_PCI_HOST_BRIDGE(dev);
-    /* Set PCI window size the way seabios has always done it. */
-    /* Power of 2 so bios can cover it with a single MTRR */
-    if (ram_size <= 0x80000000) {
-        i440fx->pci_info.w32.begin = 0x80000000;
-    } else if (ram_size <= 0xc0000000) {
-        i440fx->pci_info.w32.begin = 0xc0000000;
-    } else {
-        i440fx->pci_info.w32.begin = 0xe0000000;
-    }
+    i440fx->pci_info.w32.begin = below_4g_mem_size;
 
     /* setup pci memory mapping */
     pc_pci_as_mapping_init(OBJECT(f), f->system_memory,
-- 
MST

  parent reply	other threads:[~2013-12-23 16:08 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-23 16:11 [Qemu-devel] [PULL 00/19] acpi, pci, pc, fedora, virtio fixes and enhancements Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 01/19] piix: gigabyte alignment for ram Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 02/19] pc_piix: document gigabyte_align Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 03/19] hw/i386/pc_sysfw: support two flash drives Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 04/19] i440fx-test: qtest_start() should be paired with qtest_end() Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 05/19] i440fx-test: give each GTest case its own qtest Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 06/19] i440fx-test: generate temporary firmware blob Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 07/19] i440fx-test: verify firmware under 4G and 1M, both -bios and -pflash Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 08/19] acpi: piix4: remove not needed GPE0 mask Michael S. Tsirkin
2013-12-23 16:11 ` [Qemu-devel] [PULL 09/19] acpi: factor out common pm_update_sci() into acpi core Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 10/19] acpi: ich9: allow guest to clear SCI rised by GPE Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 11/19] ACPI: Q35 DSDT: fix CPU hotplug GPE0.2 handler Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 12/19] ACPI/DSDT-CPU: cleanup bogus comment Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 13/19] pci: do not export pci_bus_reset Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 14/19] pci: clean up resetting of IRQs Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 15/19] qdev: allow both pre- and post-order vists in qdev walking functions Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 16/19] qdev: switch reset to post-order Michael S. Tsirkin
2013-12-23 16:12 ` Michael S. Tsirkin [this message]
2013-12-23 16:12 ` [Qemu-devel] [PULL 18/19] virtio: add back call to virtio_bus_device_unplugged Michael S. Tsirkin
2013-12-23 16:12 ` [Qemu-devel] [PULL 19/19] target-arm: fix build with gcc 4.8.2 Michael S. Tsirkin

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