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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
	patches@linaro.org, "Michael Matz" <matz@suse.de>,
	"Alexander Graf" <agraf@suse.de>,
	"Claudio Fontana" <claudio.fontana@linaro.org>,
	"Dirk Mueller" <dmueller@suse.de>,
	"Will Newton" <will.newton@linaro.org>,
	"Laurent Desnogues" <laurent.desnogues@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	kvmarm@lists.cs.columbia.edu,
	"Christoffer Dall" <christoffer.dall@linaro.org>,
	"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v2 09/10] target-arm: A64: Add support for floating point cond select
Date: Mon, 30 Dec 2013 16:34:34 +0000	[thread overview]
Message-ID: <1388421275-2035-10-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1388421275-2035-1-git-send-email-peter.maydell@linaro.org>

From: Claudio Fontana <claudio.fontana@linaro.org>

This adds decoding support for C3.6.24 FP conditional select.

Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
 target-arm/translate-a64.c | 45 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 44 insertions(+), 1 deletion(-)

diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 44d8a09..c9fbf0f 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -3304,6 +3304,20 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn)
     }
 }
 
+/* copy src FP register to dst FP register; type specifies single or double */
+static void gen_mov_fp2fp(DisasContext *s, int type, int dst, int src)
+{
+    if (type) {
+        TCGv_i64 v = read_fp_dreg(s, src);
+        write_fp_dreg(s, dst, v);
+        tcg_temp_free_i64(v);
+    } else {
+        TCGv_i32 v = read_fp_sreg(s, src);
+        write_fp_sreg(s, dst, v);
+        tcg_temp_free_i32(v);
+    }
+}
+
 /* C3.6.24 Floating point conditional select
  *   31  30  29 28       24 23  22  21 20  16 15  12 11 10 9    5 4    0
  * +---+---+---+-----------+------+---+------+------+-----+------+------+
@@ -3312,7 +3326,36 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn)
  */
 static void disas_fp_csel(DisasContext *s, uint32_t insn)
 {
-    unsupported_encoding(s, insn);
+    unsigned int mos, type, rm, cond, rn, rd;
+    int label_continue = -1;
+
+    mos = extract32(insn, 29, 3);
+    type = extract32(insn, 22, 2); /* 0 = single, 1 = double */
+    rm = extract32(insn, 16, 5);
+    cond = extract32(insn, 12, 4);
+    rn = extract32(insn, 5, 5);
+    rd = extract32(insn, 0, 5);
+
+    if (mos || type > 1) {
+        unallocated_encoding(s);
+        return;
+    }
+
+    if (cond < 0x0e) { /* not always */
+        int label_match = gen_new_label();
+        label_continue = gen_new_label();
+        arm_gen_test_cc(cond, label_match);
+        /* nomatch: */
+        gen_mov_fp2fp(s, type, rd, rm);
+        tcg_gen_br(label_continue);
+        gen_set_label(label_match);
+    }
+
+    gen_mov_fp2fp(s, type, rd, rn);
+
+    if (cond < 0x0e) { /* continue */
+        gen_set_label(label_continue);
+    }
 }
 
 /* C3.6.25 Floating point data-processing (1 source)
-- 
1.8.5

  parent reply	other threads:[~2013-12-30 16:57 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-30 16:34 [Qemu-devel] [PATCH v2 00/10] A64 decoder patchset 5: most floating point Peter Maydell
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state Peter Maydell
2013-12-30 17:57   ` Richard Henderson
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 02/10] target-arm: A64: Fix vector register access on bigendian hosts Peter Maydell
2013-12-30 17:59   ` Richard Henderson
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 03/10] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum Peter Maydell
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 04/10] target-arm: A64: Add "Floating-point data-processing (2 source)" insns Peter Maydell
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 05/10] target-arm: A64: Add "Floating-point data-processing (3 " Peter Maydell
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 06/10] target-arm: A64: Add fmov (scalar, immediate) instruction Peter Maydell
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 07/10] target-arm: A64: Add support for floating point compare Peter Maydell
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 08/10] target-arm: A64: Add support for floating point conditional compare Peter Maydell
2013-12-30 16:34 ` Peter Maydell [this message]
2013-12-30 16:34 ` [Qemu-devel] [PATCH v2 10/10] target-arm: Give the FPSCR rounding modes names Peter Maydell

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