From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55536) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vxfnf-0008IE-8P for qemu-devel@nongnu.org; Mon, 30 Dec 2013 11:34:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vxfne-0004VT-3z for qemu-devel@nongnu.org; Mon, 30 Dec 2013 11:34:43 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:44004) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vxfnd-0004VE-SU for qemu-devel@nongnu.org; Mon, 30 Dec 2013 11:34:42 -0500 From: Peter Maydell Date: Mon, 30 Dec 2013 16:34:35 +0000 Message-Id: <1388421275-2035-11-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1388421275-2035-1-git-send-email-peter.maydell@linaro.org> References: <1388421275-2035-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH v2 10/10] target-arm: Give the FPSCR rounding modes names List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson From: Alexander Graf When setting rounding modes we currently just hardcode the numeric values for rounding modes in a big switch statement. With AArch64 support coming, we will need to refer to these rounding modes at different places throughout the code though, so let's better give them names so we don't get confused by accident. Signed-off-by: Alexander Graf [WN: Commit message tweak, use names from ARM ARM.] Signed-off-by: Will Newton Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target-arm/cpu.h | 9 +++++++++ target-arm/helper.c | 8 ++++---- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 6c84e22..1a32907 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -487,6 +487,15 @@ static inline void vfp_set_fpcr(CPUARMState *env, uint32_t val) vfp_set_fpscr(env, new_fpscr); } +enum arm_fprounding { + FPROUNDING_TIEEVEN, + FPROUNDING_POSINF, + FPROUNDING_NEGINF, + FPROUNDING_ZERO, + FPROUNDING_TIEAWAY, + FPROUNDING_ODD +}; + enum arm_cpu_mode { ARM_CPU_MODE_USR = 0x10, ARM_CPU_MODE_FIQ = 0x11, diff --git a/target-arm/helper.c b/target-arm/helper.c index d1ed6b0..b157c55 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3815,16 +3815,16 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t val) if (changed & (3 << 22)) { i = (val >> 22) & 3; switch (i) { - case 0: + case FPROUNDING_TIEEVEN: i = float_round_nearest_even; break; - case 1: + case FPROUNDING_POSINF: i = float_round_up; break; - case 2: + case FPROUNDING_NEGINF: i = float_round_down; break; - case 3: + case FPROUNDING_ZERO: i = float_round_to_zero; break; } -- 1.8.5