From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35404) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0css-0002kz-6A for qemu-devel@nongnu.org; Tue, 07 Jan 2014 15:04:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0csq-00032P-4d for qemu-devel@nongnu.org; Tue, 07 Jan 2014 15:04:18 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:44503) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0csp-00032D-UX for qemu-devel@nongnu.org; Tue, 07 Jan 2014 15:04:16 -0500 From: Peter Maydell Date: Tue, 7 Jan 2014 20:03:40 +0000 Message-Id: <1389125052-22931-45-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1389125052-22931-1-git-send-email-peter.maydell@linaro.org> References: <1389125052-22931-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 44/76] char/cadence_uart: Use the TX fifo for transmission List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno From: Peter Crosthwaite Populate the TxFIFO with the Tx data before sending. Prepares support for proper Tx flow control implementation. Signed-off-by: Peter Crosthwaite Message-id: bdf7f8af2ef02839bea18665701bc2612f7baa6f.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- hw/char/cadence_uart.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 3bcaf29..be32126 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -292,7 +292,22 @@ static void uart_write_tx_fifo(UartState *s, const uint8_t *buf, int size) return; } - qemu_chr_fe_write_all(s->chr, buf, size); + if (size > TX_FIFO_SIZE - s->tx_count) { + size = TX_FIFO_SIZE - s->tx_count; + /* + * This can only be a guest error via a bad tx fifo register push, + * as can_receive() should stop remote loop and echo modes ever getting + * us to here. + */ + qemu_log_mask(LOG_GUEST_ERROR, "cadence_uart: TxFIFO overflow"); + s->r[R_CISR] |= UART_INTR_ROVR; + } + + memcpy(s->tx_fifo + s->tx_count, buf, size); + s->tx_count += size; + + qemu_chr_fe_write_all(s->chr, s->tx_fifo, s->tx_count); + s->tx_count = 0; } static void uart_receive(void *opaque, const uint8_t *buf, int size) -- 1.8.5