From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35990) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0ctl-0004KJ-P0 for qemu-devel@nongnu.org; Tue, 07 Jan 2014 15:05:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0ctg-0003W3-U4 for qemu-devel@nongnu.org; Tue, 07 Jan 2014 15:05:13 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:44524) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0ctg-0003Am-MO for qemu-devel@nongnu.org; Tue, 07 Jan 2014 15:05:08 -0500 From: Peter Maydell Date: Tue, 7 Jan 2014 20:03:46 +0000 Message-Id: <1389125052-22931-51-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1389125052-22931-1-git-send-email-peter.maydell@linaro.org> References: <1389125052-22931-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 50/76] target-arm: fix build with gcc 4.8.2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno From: "Michael S. Tsirkin" commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3 "target-arm: A64: add set_pc cpu method" introduces an array aarch64_cpus which is zero size if this code is built without CONFIG_USER_ONLY. In particular an attempt to iterate over this array produces a warning under gcc 4.8.2: CC aarch64-softmmu/target-arm/cpu64.o /scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’: /scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned expression < 0 is always false [-Werror=type-limits] for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) { ^ cc1: all warnings being treated as errors This is the result of ARRAY_SIZE being an unsigned type, causing "i" to be promoted to unsigned int as well. As zero size arrays are a gcc extension, it seems cleanest to add a dummy element with NULL name, and test for it during registration. We'll be able to drop this when we add more CPUs. Cc: Alexander Graf Cc: Peter Maydell Cc: Richard Henderson Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Weil Reviewed-by: Peter Maydell Message-id: 20131223145216.GA22663@redhat.com Signed-off-by: Peter Maydell --- target-arm/cpu64.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index 04ce879..60acd24 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -58,6 +58,7 @@ static const ARMCPUInfo aarch64_cpus[] = { #ifdef CONFIG_USER_ONLY { .name = "any", .initfn = aarch64_any_initfn }, #endif + { .name = NULL } /* TODO: drop when we support more CPUs */ }; static void aarch64_cpu_initfn(Object *obj) @@ -100,6 +101,11 @@ static void aarch64_cpu_register(const ARMCPUInfo *info) .class_init = info->class_init, }; + /* TODO: drop when we support more CPUs - all entries will have name set */ + if (!info->name) { + return; + } + type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); type_register(&type_info); g_free((void *)type_info.name); -- 1.8.5