From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47404) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmV-0003JI-8Z for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0dmQ-0003ap-Dg for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:47 -0500 Received: from mail-qe0-x232.google.com ([2607:f8b0:400d:c02::232]:47970) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmQ-0003ag-7S for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:42 -0500 Received: by mail-qe0-f50.google.com with SMTP id 1so950299qec.9 for ; Tue, 07 Jan 2014 13:01:41 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Tue, 7 Jan 2014 13:00:05 -0800 Message-Id: <1389128439-10067-16-git-send-email-rth@twiddle.net> In-Reply-To: <1389128439-10067-1-git-send-email-rth@twiddle.net> References: <1389128439-10067-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 15/49] target-i386: Tidy mov[sz][bw] List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@amazon.com We can use the MO_SIGN bit to tidy the reg-reg switch statement as well as pass it on to gen_op_ld_v, eliminating one call. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-i386/translate.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 9205b72..f3baa4d 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -5618,11 +5618,16 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0x1be: /* movsbS Gv, Eb */ case 0x1bf: /* movswS Gv, Eb */ { - int d_ot; + TCGMemOp d_ot; + TCGMemOp s_ot; + /* d_ot is the size of destination */ d_ot = dflag + MO_16; /* ot is the size of source */ ot = (b & 1) + MO_8; + /* s_ot is the sign+size of source */ + s_ot = b & 8 ? MO_SIGN | ot : ot; + modrm = cpu_ldub_code(env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; @@ -5630,29 +5635,25 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, if (mod == 3) { gen_op_mov_TN_reg(ot, 0, rm); - switch(ot | (b & 8)) { - case MO_8: + switch (s_ot) { + case MO_UB: tcg_gen_ext8u_tl(cpu_T[0], cpu_T[0]); break; - case MO_8 | 8: + case MO_SB: tcg_gen_ext8s_tl(cpu_T[0], cpu_T[0]); break; - case MO_16: + case MO_UW: tcg_gen_ext16u_tl(cpu_T[0], cpu_T[0]); break; default: - case MO_16 | 8: + case MO_SW: tcg_gen_ext16s_tl(cpu_T[0], cpu_T[0]); break; } gen_op_mov_reg_T0(d_ot, reg); } else { gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); - if (b & 8) { - gen_op_ld_v(s, ot | MO_SIGN, cpu_T[0], cpu_A0); - } else { - gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); - } + gen_op_ld_v(s, s_ot, cpu_T[0], cpu_A0); gen_op_mov_reg_T0(d_ot, reg); } } -- 1.8.4.2