From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47460) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmc-0003Xn-NE for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:02:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0dmY-0003c9-0q for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:54 -0500 Received: from mail-qa0-x22e.google.com ([2607:f8b0:400d:c00::22e]:36498) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmX-0003c2-QQ for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:49 -0500 Received: by mail-qa0-f46.google.com with SMTP id j5so1043319qaq.19 for ; Tue, 07 Jan 2014 13:01:49 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Tue, 7 Jan 2014 13:00:09 -0800 Message-Id: <1389128439-10067-20-git-send-email-rth@twiddle.net> In-Reply-To: <1389128439-10067-1-git-send-email-rth@twiddle.net> References: <1389128439-10067-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 19/49] target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@amazon.com For the 16 and 32-bit cases, we don't need to truncate via a temporary register. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-i386/translate.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index c07062c..3d03d47 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1259,8 +1259,7 @@ static inline void gen_ins(DisasContext *s, int ot) case of page fault. */ gen_op_movl_T0_0(); gen_op_st_v(s, ot, cpu_T[0], cpu_A0); - gen_op_mov_TN_reg(MO_16, 1, R_EDX); - tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]); + tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[R_EDX]); tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff); gen_helper_in_func(ot, cpu_T[0], cpu_tmp2_i32); gen_op_st_v(s, ot, cpu_T[0], cpu_A0); @@ -1277,8 +1276,7 @@ static inline void gen_outs(DisasContext *s, int ot) gen_string_movl_A0_ESI(s); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); - gen_op_mov_TN_reg(MO_16, 1, R_EDX); - tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]); + tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[R_EDX]); tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff); tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[0]); gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32); @@ -3839,8 +3837,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, ot = MO_64; } - gen_op_mov_TN_reg(MO_32, 0, reg); - tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); + tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[reg]); gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); gen_helper_crc32(cpu_T[0], cpu_tmp2_i32, cpu_T[0], tcg_const_i32(8 << ot)); -- 1.8.4.2