From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47556) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmo-0003uN-9I for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:02:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0dmj-0003eQ-B2 for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:02:05 -0500 Received: from mail-qc0-x230.google.com ([2607:f8b0:400d:c01::230]:63600) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmj-0003eG-4o for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:02:01 -0500 Received: by mail-qc0-f176.google.com with SMTP id i8so661753qcq.21 for ; Tue, 07 Jan 2014 13:02:00 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Tue, 7 Jan 2014 13:00:16 -0800 Message-Id: <1389128439-10067-27-git-send-email-rth@twiddle.net> In-Reply-To: <1389128439-10067-1-git-send-email-rth@twiddle.net> References: <1389128439-10067-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 26/49] target-i386: Remove gen_op_mov*_A0_im List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@amazon.com Propagate the definitions into all users. In two cases, this allows us to share code between the 32-bit and 64-bit immediate moves. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-i386/translate.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 59554aa..ade8606 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -252,18 +252,6 @@ static void gen_update_cc_op(DisasContext *s) } } -static inline void gen_op_movl_A0_im(uint32_t val) -{ - tcg_gen_movi_tl(cpu_A0, val); -} - -#ifdef TARGET_X86_64 -static inline void gen_op_movq_A0_im(int64_t val) -{ - tcg_gen_movi_tl(cpu_A0, val); -} -#endif - static inline void gen_movtl_T0_im(target_ulong val) { tcg_gen_movi_tl(cpu_T[0], val); @@ -2046,7 +2034,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) if (rm == 6) { disp = cpu_lduw_code(env, s->pc); s->pc += 2; - gen_op_movl_A0_im(disp); + tcg_gen_movi_tl(cpu_A0, disp); rm = 0; /* avoid SS override */ goto no_rm; } else { @@ -5619,7 +5607,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, if (s->aflag == 2) { offset_addr = cpu_ldq_code(env, s->pc); s->pc += 8; - gen_op_movq_A0_im(offset_addr); } else #endif { @@ -5628,8 +5615,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } else { offset_addr = insn_get(env, s, MO_16); } - gen_op_movl_A0_im(offset_addr); } + tcg_gen_movi_tl(cpu_A0, offset_addr); gen_add_A0_ds_seg(s); if ((b & 2) == 0) { gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); -- 1.8.4.2