From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmK-0002yP-VB for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0dmF-0003Kq-39 for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:36 -0500 Received: from mail-qa0-x233.google.com ([2607:f8b0:400d:c00::233]:41628) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0dmE-0003JE-Tg for qemu-devel@nongnu.org; Tue, 07 Jan 2014 16:01:31 -0500 Received: by mail-qa0-f51.google.com with SMTP id i13so1062655qae.24 for ; Tue, 07 Jan 2014 13:01:30 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Tue, 7 Jan 2014 12:59:58 -0800 Message-Id: <1389128439-10067-9-git-send-email-rth@twiddle.net> In-Reply-To: <1389128439-10067-1-git-send-email-rth@twiddle.net> References: <1389128439-10067-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 08/49] target-i386: Remove gen_op_ldu_T0_A0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@amazon.com Propagate its definition into all users. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-i386/translate.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 6efe64f..97bbc1f 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -586,11 +586,6 @@ static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0) tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE); } -static inline void gen_op_ldu_T0_A0(DisasContext *s, int idx) -{ - gen_op_ld_v(s, idx, cpu_T[0], cpu_A0); -} - static inline void gen_op_ld_T1_A0(DisasContext *s, int idx) { gen_op_ld_v(s, idx, cpu_T[1], cpu_A0); @@ -5173,7 +5168,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 3: /* lcall Ev */ gen_op_ld_T1_A0(s, ot); gen_add_A0_im(s, 1 << (ot - MO_16 + 1)); - gen_op_ldu_T0_A0(s, MO_16); + gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0); do_lcall: if (s->pe && !s->vm86) { gen_update_cc_op(s); @@ -5199,7 +5194,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 5: /* ljmp Ev */ gen_op_ld_T1_A0(s, ot); gen_add_A0_im(s, 1 << (ot - MO_16 + 1)); - gen_op_ldu_T0_A0(s, MO_16); + gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0); do_ljmp: if (s->pe && !s->vm86) { gen_update_cc_op(s); @@ -5712,7 +5707,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, if (b & 8) { gen_op_lds_T0_A0(s, ot); } else { - gen_op_ldu_T0_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); } gen_op_mov_reg_T0(d_ot, reg); } @@ -5791,7 +5786,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff); } gen_add_A0_ds_seg(s); - gen_op_ldu_T0_A0(s, MO_8); + gen_op_ld_v(s, MO_8, cpu_T[0], cpu_A0); gen_op_mov_reg_T0(MO_8, R_EAX); break; case 0xb0 ... 0xb7: /* mov R, Ib */ @@ -5882,7 +5877,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_ld_T1_A0(s, ot); gen_add_A0_im(s, 1 << (ot - MO_16 + 1)); /* load the segment first to handle exceptions properly */ - gen_op_ldu_T0_A0(s, MO_16); + gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0); gen_movl_seg_T0(s, op, pc_start - s->cs_base); /* then put the data */ gen_op_mov_reg_T1(ot, reg); -- 1.8.4.2