qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: edgar.iglesias@gmail.com
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, blauwirbel@gmail.com,
	aliguori@amazon.com, pcrost@xilinx.com, pbonzini@redhat.com,
	afaerber@suse.de, aurelien@aurel32.net, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v3 13/22] exec: Make stl_phys_notdirty input an AddressSpace
Date: Mon, 13 Jan 2014 17:39:53 +1000	[thread overview]
Message-ID: <1389598802-14977-14-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1389598802-14977-1-git-send-email-edgar.iglesias@gmail.com>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 exec.c                    |    4 ++--
 hw/arm/boot.c             |    9 +++++----
 hw/arm/highbank.c         |    6 +++---
 include/exec/cpu-common.h |    2 +-
 target-i386/helper.c      |   16 ++++++++--------
 target-sparc/mmu_helper.c |    2 +-
 6 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/exec.c b/exec.c
index cefd3be..a64577d 100644
--- a/exec.c
+++ b/exec.c
@@ -2526,14 +2526,14 @@ uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr)
 /* warning: addr must be aligned. The ram page is not masked as dirty
    and the code inside is not invalidated. It is useful if the dirty
    bits are used to track modified PTEs */
-void stl_phys_notdirty(hwaddr addr, uint32_t val)
+void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
 {
     uint8_t *ptr;
     MemoryRegion *mr;
     hwaddr l = 4;
     hwaddr addr1;
 
-    mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
+    mr = address_space_translate(as, addr, &addr1, &l,
                                  true);
     if (l < 4 || !memory_access_is_direct(mr, true)) {
         io_mem_write(mr, addr1, val, 4);
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 1c1b0e5..0e91a1a 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -16,6 +16,7 @@
 #include "elf.h"
 #include "sysemu/device_tree.h"
 #include "qemu/config-file.h"
+#include "exec/address-spaces.h"
 
 /* Kernel boot protocol is specified in the kernel docs
  * Documentation/arm/Booting and Documentation/arm64/booting.txt
@@ -169,13 +170,13 @@ static void default_reset_secondary(ARMCPU *cpu,
 {
     CPUARMState *env = &cpu->env;
 
-    stl_phys_notdirty(info->smp_bootreg_addr, 0);
+    stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0);
     env->regs[15] = info->smp_loader_start;
 }
 
-#define WRITE_WORD(p, value) do { \
-    stl_phys_notdirty(p, value);  \
-    p += 4;                       \
+#define WRITE_WORD(p, value) do {                        \
+    stl_phys_notdirty(&address_space_memory, p, value);  \
+    p += 4;                                              \
 } while (0)
 
 static void set_kernel_args(const struct arm_boot_info *info)
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index d76a1d1..f66d57b 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -69,11 +69,11 @@ static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
 
     switch (info->nb_cpus) {
     case 4:
-        stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0);
+        stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x30, 0);
     case 3:
-        stl_phys_notdirty(SMP_BOOT_REG + 0x20, 0);
+        stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x20, 0);
     case 2:
-        stl_phys_notdirty(SMP_BOOT_REG + 0x10, 0);
+        stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x10, 0);
         env->regs[15] = SMP_BOOT_ADDR;
         break;
     default:
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index d005c98..525fb62 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -102,7 +102,7 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
 uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
 uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
 uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
-void stl_phys_notdirty(hwaddr addr, uint32_t val);
+void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
 void stw_phys(hwaddr addr, uint32_t val);
 void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
 void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 0606908..55c0457 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -574,7 +574,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
             }
             if (!(pml4e & PG_ACCESSED_MASK)) {
                 pml4e |= PG_ACCESSED_MASK;
-                stl_phys_notdirty(pml4e_addr, pml4e);
+                stl_phys_notdirty(cs->as, pml4e_addr, pml4e);
             }
             ptep = pml4e ^ PG_NX_MASK;
             pdpe_addr = ((pml4e & PHYS_ADDR_MASK) + (((addr >> 30) & 0x1ff) << 3)) &
@@ -591,7 +591,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
             ptep &= pdpe ^ PG_NX_MASK;
             if (!(pdpe & PG_ACCESSED_MASK)) {
                 pdpe |= PG_ACCESSED_MASK;
-                stl_phys_notdirty(pdpe_addr, pdpe);
+                stl_phys_notdirty(cs->as, pdpe_addr, pdpe);
             }
         } else
 #endif
@@ -661,7 +661,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
                 pde |= PG_ACCESSED_MASK;
                 if (is_dirty)
                     pde |= PG_DIRTY_MASK;
-                stl_phys_notdirty(pde_addr, pde);
+                stl_phys_notdirty(cs->as, pde_addr, pde);
             }
             /* align to page_size */
             pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff);
@@ -670,7 +670,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
             /* 4 KB page */
             if (!(pde & PG_ACCESSED_MASK)) {
                 pde |= PG_ACCESSED_MASK;
-                stl_phys_notdirty(pde_addr, pde);
+                stl_phys_notdirty(cs->as, pde_addr, pde);
             }
             pte_addr = ((pde & PHYS_ADDR_MASK) + (((addr >> 12) & 0x1ff) << 3)) &
                 env->a20_mask;
@@ -723,7 +723,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
                 pte |= PG_ACCESSED_MASK;
                 if (is_dirty)
                     pte |= PG_DIRTY_MASK;
-                stl_phys_notdirty(pte_addr, pte);
+                stl_phys_notdirty(cs->as, pte_addr, pte);
             }
             page_size = 4096;
             virt_addr = addr & ~0xfff;
@@ -778,7 +778,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
                 pde |= PG_ACCESSED_MASK;
                 if (is_dirty)
                     pde |= PG_DIRTY_MASK;
-                stl_phys_notdirty(pde_addr, pde);
+                stl_phys_notdirty(cs->as, pde_addr, pde);
             }
 
             pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */
@@ -787,7 +787,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
         } else {
             if (!(pde & PG_ACCESSED_MASK)) {
                 pde |= PG_ACCESSED_MASK;
-                stl_phys_notdirty(pde_addr, pde);
+                stl_phys_notdirty(cs->as, pde_addr, pde);
             }
 
             /* page directory entry */
@@ -835,7 +835,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
                 pte |= PG_ACCESSED_MASK;
                 if (is_dirty)
                     pte |= PG_DIRTY_MASK;
-                stl_phys_notdirty(pte_addr, pte);
+                stl_phys_notdirty(cs->as, pte_addr, pte);
             }
             page_size = 4096;
             virt_addr = addr & ~0xfff;
diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
index 46bb038..5fc2fd6 100644
--- a/target-sparc/mmu_helper.c
+++ b/target-sparc/mmu_helper.c
@@ -180,7 +180,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
         if (is_dirty) {
             pde |= PG_MODIFIED_MASK;
         }
-        stl_phys_notdirty(pde_ptr, pde);
+        stl_phys_notdirty(cs->as, pde_ptr, pde);
     }
 
     /* the page can be put in the TLB */
-- 
1.7.10.4

  parent reply	other threads:[~2014-01-13  7:48 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-13  7:39 [Qemu-devel] [PATCH v3 00/22] Steps towards per CPU address-spaces edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 01/22] exec: Make tb_invalidate_phys_addr input an AS edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 02/22] exec: Make iotlb_to_region " edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 03/22] exec: Always initialize MemorySection address spaces edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 04/22] exec: Make memory_region_section_get_iotlb use section AS edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 05/22] memory: Add MemoryListener to typedefs.h edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 06/22] cpu: Add per-cpu address space edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 07/22] exec: On AS changes, only flush affected CPU TLBs edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 08/22] exec: Make ldl_*_phys input an AddressSpace edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 09/22] exec: Make ldq/ldub_*_phys " edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 10/22] exec: Make lduw_*_phys " edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 11/22] exec: Make stq_*_phys " edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 12/22] exec: Make stl_*_phys " edgar.iglesias
2014-01-13  7:39 ` edgar.iglesias [this message]
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 14/22] exec: Make stw_*_phys " edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 15/22] exec: Make stb_phys " edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 16/22] exec: Make cpu_physical_memory_write_rom input an AS edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 17/22] exec: Make cpu_memory_rw_debug use the CPUs AS edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 18/22] memory: Add address_space_find_by_name() edgar.iglesias
2014-01-13  7:39 ` [Qemu-devel] [PATCH v3 19/22] qdev: Add qdev property type for AddressSpaces edgar.iglesias
2014-01-13  7:40 ` [Qemu-devel] [PATCH v3 20/22] cpu: Add address-space property edgar.iglesias
2014-01-13  7:40 ` [Qemu-devel] [PATCH v3 21/22] petalogix-ml605: Create the CPU with object_new() edgar.iglesias
2014-01-13  7:40 ` [Qemu-devel] [PATCH v3 22/22] petalogix-ml605: Make the LMB visible only to the CPU edgar.iglesias
2014-01-13 20:37 ` [Qemu-devel] [PATCH v3 00/22] Steps towards per CPU address-spaces Artyom Tarasenko
2014-01-13 23:34   ` Edgar E. Iglesias

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1389598802-14977-14-git-send-email-edgar.iglesias@gmail.com \
    --to=edgar.iglesias@gmail.com \
    --cc=afaerber@suse.de \
    --cc=aliguori@amazon.com \
    --cc=aurelien@aurel32.net \
    --cc=blauwirbel@gmail.com \
    --cc=pbonzini@redhat.com \
    --cc=pcrost@xilinx.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).