From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41128) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W375S-00027T-JF for qemu-devel@nongnu.org; Tue, 14 Jan 2014 11:43:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W375L-0001In-F1 for qemu-devel@nongnu.org; Tue, 14 Jan 2014 11:43:34 -0500 Received: from mail-we0-f176.google.com ([74.125.82.176]:41824) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W375L-0001Ie-9N for qemu-devel@nongnu.org; Tue, 14 Jan 2014 11:43:27 -0500 Received: by mail-we0-f176.google.com with SMTP id q58so650006wes.35 for ; Tue, 14 Jan 2014 08:43:26 -0800 (PST) From: Will Newton Date: Tue, 14 Jan 2014 16:43:06 +0000 Message-Id: <1389717790-30860-6-git-send-email-will.newton@linaro.org> In-Reply-To: <1389717790-30860-1-git-send-email-will.newton@linaro.org> References: <1389717790-30860-1-git-send-email-will.newton@linaro.org> Subject: [Qemu-devel] [PATCH 5/9] target-arm: Add support for AArch32 FP VRINTX List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell Add support for the AArch32 floating-point VRINTX instruction. Signed-off-by: Will Newton --- target-arm/translate.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/target-arm/translate.c b/target-arm/translate.c index 153d0e6..5108f6b 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -3406,6 +3406,17 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) tcg_temp_free_ptr(fpst); } break; + case 14: /* vrintx */ + if (dp) { + TCGv_ptr fpst = get_fpstatus_ptr(0); + gen_helper_rintd_exact(cpu_F0d, cpu_F0d, fpst); + tcg_temp_free_ptr(fpst); + } else { + TCGv_ptr fpst = get_fpstatus_ptr(0); + gen_helper_rints_exact(cpu_F0s, cpu_F0s, fpst); + tcg_temp_free_ptr(fpst); + } + break; case 15: /* single<->double conversion */ if (dp) gen_helper_vfp_fcvtsd(cpu_F0s, cpu_F0d, cpu_env); -- 1.8.1.4