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From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [V7 PATCH 02/18] target-ppc: VSX Stage 4: Refactor lxsdx
Date: Wed, 15 Jan 2014 08:10:29 -0600	[thread overview]
Message-ID: <1389795045-5504-3-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1389795045-5504-1-git-send-email-tommusta@gmail.com>

This patch refactors the lxsdx generator. Resuable code is isolated
into a macro.  The macro will be used in subsequent patches in this
series to implement other scalar load instructions.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
 target-ppc/translate.c |   31 +++++++++++++++++--------------
 1 files changed, 17 insertions(+), 14 deletions(-)

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 79be8ed..ca26dcf 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7022,20 +7022,23 @@ static inline TCGv_i64 cpu_vsrl(int n)
     }
 }
 
-static void gen_lxsdx(DisasContext *ctx)
-{
-    TCGv EA;
-    if (unlikely(!ctx->vsx_enabled)) {
-        gen_exception(ctx, POWERPC_EXCP_VSXU);
-        return;
-    }
-    gen_set_access_type(ctx, ACCESS_INT);
-    EA = tcg_temp_new();
-    gen_addr_reg_index(ctx, EA);
-    gen_qemu_ld64(ctx, cpu_vsrh(xT(ctx->opcode)), EA);
-    /* NOTE: cpu_vsrl is undefined */
-    tcg_temp_free(EA);
-}
+#define VSX_LOAD_SCALAR(name, operation)                      \
+static void gen_##name(DisasContext *ctx)                     \
+{                                                             \
+    TCGv EA;                                                  \
+    if (unlikely(!ctx->vsx_enabled)) {                        \
+        gen_exception(ctx, POWERPC_EXCP_VSXU);                \
+        return;                                               \
+    }                                                         \
+    gen_set_access_type(ctx, ACCESS_INT);                     \
+    EA = tcg_temp_new();                                      \
+    gen_addr_reg_index(ctx, EA);                              \
+    gen_qemu_##operation(ctx, cpu_vsrh(xT(ctx->opcode)), EA); \
+    /* NOTE: cpu_vsrl is undefined */                         \
+    tcg_temp_free(EA);                                        \
+}
+
+VSX_LOAD_SCALAR(lxsdx, ld64)
 
 static void gen_lxvd2x(DisasContext *ctx)
 {
-- 
1.7.1

  parent reply	other threads:[~2014-01-15 14:11 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-15 14:10 [Qemu-devel] [V7 PATCH 00/18] target-ppc: VSX Stage 4 Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 01/18] target-ppc: VSX Stage 4: Add VSX 2.07 Flag Tom Musta
2014-01-15 14:10 ` Tom Musta [this message]
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 03/18] target-ppc: VSX Stage 4: Add lxsiwax, lxsiwzx and lxsspx Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 04/18] target-ppc: VSX Stage 4: Refactor stxsdx Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 05/18] target-ppc: VSX Stage 4: Add stxsiwx and stxsspx Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 06/18] target-ppc: VSX Stage 4: Add xsaddsp and xssubsp Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 07/18] target-ppc: VSX Stage 4: Add xsmulsp Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 08/18] target-ppc: VSX Stage 4: Add xsdivsp Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 09/18] target-ppc: VSX Stage 4: Add xsresp Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 10/18] target-ppc: VSX Stage 4: Add xssqrtsp Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 11/18] target-ppc: VSX Stage 4: add xsrsqrtesp Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 12/18] target-ppc: VSX Stage 4: Add Scalar SP Fused Multiply-Adds Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 13/18] target-ppc: VSX Stage 4: Add xscvsxdsp and xscvuxdsp Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 14/18] target-ppc: VSX Stage 4: Add xxleqv, xxlnand and xxlorc Tom Musta
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 15/18] target-ppc: Move To/From VSR Instructions Tom Musta
2014-01-15 21:28   ` Richard Henderson
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 16/18] target-ppc: Floating Merge Word Instructions Tom Musta
2014-01-15 21:21   ` Richard Henderson
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 17/18] target-ppc: Scalar Round to Single Precision Tom Musta
2014-01-15 21:22   ` Richard Henderson
2014-01-15 14:10 ` [Qemu-devel] [V7 PATCH 18/18] target-ppc: Scalar Non-Signalling Conversions Tom Musta
2014-01-15 21:26   ` Richard Henderson
2014-01-27 15:52 ` [Qemu-devel] [Qemu-ppc] [V7 PATCH 00/18] target-ppc: VSX Stage 4 Alexander Graf

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