[Qemu-devel] [PATCH v2 1/2] target-ppc: introduce powerisa-207-server flag

[Alexey Kardashevskiy <aik@ozlabs.ru>]

This flag will be used to decide whether to emulate some bits of
H_SET_MODE hypercall because some are POWER8-only.

While we are here, add 2.05 flag to POWER8 family too. POWER7/7+ already
has it.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
 target-ppc/cpu.h            | 2 ++
 target-ppc/translate_init.c | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 51bcd4a..8e46bda 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1875,6 +1875,8 @@ enum {
     PPC2_DBRX          = 0x0000000000000010ULL,
     /* Book I 2.05 PowerPC specification                                     */
     PPC2_ISA205        = 0x0000000000000020ULL,
+    /* PowerISA 2.07 Book3s specification                                    */
+    PPC2_ISA207S       = 0x0000000000000040ULL,
 
 #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
   PPC2_ISA205)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 35470d4..7e25c35 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7144,7 +7144,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
                        PPC_64B | PPC_ALTIVEC |
                        PPC_SEGMENT_64B | PPC_SLBI |
                        PPC_POPCNTB | PPC_POPCNTWD;
-    pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX;
+    pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
+                        PPC2_ISA207S;
     pcc->msr_mask = 0x800000000284FF36ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
-- 
1.8.4.rc4