From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50947) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W5hgi-00057J-U6 for qemu-devel@nongnu.org; Tue, 21 Jan 2014 15:12:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W5hgh-0007ac-Up for qemu-devel@nongnu.org; Tue, 21 Jan 2014 15:12:44 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:44951) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W5hgh-0007WW-Oy for qemu-devel@nongnu.org; Tue, 21 Jan 2014 15:12:43 -0500 From: Peter Maydell Date: Tue, 21 Jan 2014 20:12:09 +0000 Message-Id: <1390335150-13470-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1390335150-13470-1-git-send-email-peter.maydell@linaro.org> References: <1390335150-13470-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 03/24] target-arm: Restrict check_ap() use of S and R bits to v6 and earlier List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson The SCTLR bits S and R (8 and 9) only exist in ARMv6 and earlier. In ARMv7 these bits RAZ, and in ARMv8 they are reassigned. Guard the use of them in check_ap() so that we don't get incorrect results for ARMv8 CPUs. Signed-off-by: Peter Maydell --- target-arm/helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 792953e..205e36a 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2765,6 +2765,9 @@ static inline int check_ap(CPUARMState *env, int ap, int domain_prot, switch (ap) { case 0: + if (arm_feature(env, ARM_FEATURE_V7)) { + return 0; + } if (access_type == 1) return 0; switch (env->cp15.c1_sys & (SCTLR_S | SCTLR_R)) { -- 1.8.5